Files
aligned
as_slice
bare_metal
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cortex_m
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generic_array
lpc55_hal
lpc55_pac
adc0
ahb_secure_ctrl
anactrl
casper
crc_engine
ctimer0
dbgmailbox
dma0
flash
flash_cfpa0
cmpa_prog_in_progress.rscustomer_defined.rsdcfg_cc_socu_dflt.rsdcfg_cc_socu_pin.rsenable_fa_mode.rsheader.rsimage_key_revoke.rsns_fw_version.rsprince_region0_iv_body0.rsprince_region0_iv_body1.rsprince_region0_iv_body10.rsprince_region0_iv_body11.rsprince_region0_iv_body2.rsprince_region0_iv_body3.rsprince_region0_iv_body4.rsprince_region0_iv_body5.rsprince_region0_iv_body6.rsprince_region0_iv_body7.rsprince_region0_iv_body8.rsprince_region0_iv_body9.rsprince_region0_iv_code0.rsprince_region0_iv_code1.rsprince_region0_iv_code10.rsprince_region0_iv_code11.rsprince_region0_iv_code12.rsprince_region0_iv_code13.rsprince_region0_iv_code2.rsprince_region0_iv_code3.rsprince_region0_iv_code4.rsprince_region0_iv_code5.rsprince_region0_iv_code6.rsprince_region0_iv_code7.rsprince_region0_iv_code8.rsprince_region0_iv_code9.rsprince_region0_iv_header0.rsprince_region0_iv_header1.rsprince_region1_iv_body0.rsprince_region1_iv_body1.rsprince_region1_iv_body10.rsprince_region1_iv_body11.rsprince_region1_iv_body2.rsprince_region1_iv_body3.rsprince_region1_iv_body4.rsprince_region1_iv_body5.rsprince_region1_iv_body6.rsprince_region1_iv_body7.rsprince_region1_iv_body8.rsprince_region1_iv_body9.rsprince_region1_iv_code0.rsprince_region1_iv_code1.rsprince_region1_iv_code10.rsprince_region1_iv_code11.rsprince_region1_iv_code12.rsprince_region1_iv_code13.rsprince_region1_iv_code2.rsprince_region1_iv_code3.rsprince_region1_iv_code4.rsprince_region1_iv_code5.rsprince_region1_iv_code6.rsprince_region1_iv_code7.rsprince_region1_iv_code8.rsprince_region1_iv_code9.rsprince_region1_iv_header0.rsprince_region1_iv_header1.rsprince_region2_iv_body0.rsprince_region2_iv_body1.rsprince_region2_iv_body10.rsprince_region2_iv_body11.rsprince_region2_iv_body2.rsprince_region2_iv_body3.rsprince_region2_iv_body4.rsprince_region2_iv_body5.rsprince_region2_iv_body6.rsprince_region2_iv_body7.rsprince_region2_iv_body8.rsprince_region2_iv_body9.rsprince_region2_iv_code0.rsprince_region2_iv_code1.rsprince_region2_iv_code10.rsprince_region2_iv_code11.rsprince_region2_iv_code12.rsprince_region2_iv_code13.rsprince_region2_iv_code2.rsprince_region2_iv_code3.rsprince_region2_iv_code4.rsprince_region2_iv_code5.rsprince_region2_iv_code6.rsprince_region2_iv_code7.rsprince_region2_iv_code8.rsprince_region2_iv_code9.rsprince_region2_iv_header0.rsprince_region2_iv_header1.rsrotkh_revoke.rss_fw_version.rssha256_digest.rsvendor_usage.rsversion.rs
flash_cmpa
flash_key_store
activation_code.rsheader.rsprince_region0_body0.rsprince_region0_body1.rsprince_region0_body10.rsprince_region0_body11.rsprince_region0_body2.rsprince_region0_body3.rsprince_region0_body4.rsprince_region0_body5.rsprince_region0_body6.rsprince_region0_body7.rsprince_region0_body8.rsprince_region0_body9.rsprince_region0_header0.rsprince_region0_header1.rsprince_region0_key_code0.rsprince_region0_key_code1.rsprince_region0_key_code10.rsprince_region0_key_code11.rsprince_region0_key_code12.rsprince_region0_key_code13.rsprince_region0_key_code2.rsprince_region0_key_code3.rsprince_region0_key_code4.rsprince_region0_key_code5.rsprince_region0_key_code6.rsprince_region0_key_code7.rsprince_region0_key_code8.rsprince_region0_key_code9.rsprince_region1_body0.rsprince_region1_body1.rsprince_region1_body10.rsprince_region1_body11.rsprince_region1_body2.rsprince_region1_body3.rsprince_region1_body4.rsprince_region1_body5.rsprince_region1_body6.rsprince_region1_body7.rsprince_region1_body8.rsprince_region1_body9.rsprince_region1_header0.rsprince_region1_header1.rsprince_region1_key_code0.rsprince_region1_key_code1.rsprince_region1_key_code10.rsprince_region1_key_code11.rsprince_region1_key_code12.rsprince_region1_key_code13.rsprince_region1_key_code2.rsprince_region1_key_code3.rsprince_region1_key_code4.rsprince_region1_key_code5.rsprince_region1_key_code6.rsprince_region1_key_code7.rsprince_region1_key_code8.rsprince_region1_key_code9.rsprince_region2_body0.rsprince_region2_body1.rsprince_region2_body10.rsprince_region2_body11.rsprince_region2_body2.rsprince_region2_body3.rsprince_region2_body4.rsprince_region2_body5.rsprince_region2_body6.rsprince_region2_body7.rsprince_region2_body8.rsprince_region2_body9.rsprince_region2_header0.rsprince_region2_header1.rsprince_region2_key_code0.rsprince_region2_key_code1.rsprince_region2_key_code10.rsprince_region2_key_code11.rsprince_region2_key_code12.rsprince_region2_key_code13.rsprince_region2_key_code2.rsprince_region2_key_code3.rsprince_region2_key_code4.rsprince_region2_key_code5.rsprince_region2_key_code6.rsprince_region2_key_code7.rsprince_region2_key_code8.rsprince_region2_key_code9.rspuf_discharge_time_in_ms.rssbkey_body0.rssbkey_body1.rssbkey_body10.rssbkey_body11.rssbkey_body2.rssbkey_body3.rssbkey_body4.rssbkey_body5.rssbkey_body6.rssbkey_body7.rssbkey_body8.rssbkey_body9.rssbkey_header0.rssbkey_header1.rssbkey_key_code0.rssbkey_key_code1.rssbkey_key_code10.rssbkey_key_code11.rssbkey_key_code12.rssbkey_key_code13.rssbkey_key_code2.rssbkey_key_code3.rssbkey_key_code4.rssbkey_key_code5.rssbkey_key_code6.rssbkey_key_code7.rssbkey_key_code8.rssbkey_key_code9.rsuds_body0.rsuds_body1.rsuds_body10.rsuds_body11.rsuds_body2.rsuds_body3.rsuds_body4.rsuds_body5.rsuds_body6.rsuds_body7.rsuds_body8.rsuds_body9.rsuds_header0.rsuds_header1.rsuds_key_code0.rsuds_key_code1.rsuds_key_code10.rsuds_key_code11.rsuds_key_code12.rsuds_key_code13.rsuds_key_code2.rsuds_key_code3.rsuds_key_code4.rsuds_key_code5.rsuds_key_code6.rsuds_key_code7.rsuds_key_code8.rsuds_key_code9.rsuser_kek_body0.rsuser_kek_body1.rsuser_kek_body10.rsuser_kek_body11.rsuser_kek_body2.rsuser_kek_body3.rsuser_kek_body4.rsuser_kek_body5.rsuser_kek_body6.rsuser_kek_body7.rsuser_kek_body8.rsuser_kek_body9.rsuser_kek_header0.rsuser_kek_header1.rsuser_kek_key_code0.rsuser_kek_key_code1.rsuser_kek_key_code10.rsuser_kek_key_code11.rsuser_kek_key_code12.rsuser_kek_key_code13.rsuser_kek_key_code2.rsuser_kek_key_code3.rsuser_kek_key_code4.rsuser_kek_key_code5.rsuser_kek_key_code6.rsuser_kek_key_code7.rsuser_kek_key_code8.rsuser_kek_key_code9.rs
flexcomm0
gint0
gpio
hashcrypt
i2c0
i2s0
inputmux
iocon
mailbox
mrt0
ostimer
pint
plu
pmc
powerquad
prince
puf
rng
rtc
sau
scn_scb
sct0
sdif
secgpio
spi0
syscon
adcclkdiv.rsadcclksel.rsahbclkctrl0.rsahbclkctrl1.rsahbclkctrl2.rsahbclkctrlclr.rsahbclkctrlset.rsahbclkdiv.rsahbmatprio.rsautoclkgateoverride.rsclkoutdiv.rsclkoutsel.rsclock_ctrl.rsclockgenupdatelockout.rscomp_int_ctrl.rscomp_int_status.rscpboot.rscpstat.rscpu0nstckcal.rscpu0stckcal.rscpu1stckcal.rscpucfg.rscpuctrl.rsctimerclksel0.rsctimerclksel1.rsctimerclksel2.rsctimerclksel3.rsctimerclksel4.rsctimerclkselx0.rsctimerclkselx1.rsctimerclkselx2.rsctimerclkselx3.rsctimerclkselx4.rsdebug_auth_beacon.rsdebug_features.rsdebug_features_dp.rsdebug_lock_en.rsdevice_id0.rsdieid.rsfcclksel0.rsfcclksel1.rsfcclksel2.rsfcclksel3.rsfcclksel4.rsfcclksel5.rsfcclksel6.rsfcclksel7.rsfcclkselx0.rsfcclkselx1.rsfcclkselx2.rsfcclkselx3.rsfcclkselx4.rsfcclkselx5.rsfcclkselx6.rsfcclkselx7.rsflexfrg0ctrl.rsflexfrg1ctrl.rsflexfrg2ctrl.rsflexfrg3ctrl.rsflexfrg4ctrl.rsflexfrg5ctrl.rsflexfrg6ctrl.rsflexfrg7ctrl.rsflexfrgxctrl0.rsflexfrgxctrl1.rsflexfrgxctrl2.rsflexfrgxctrl3.rsflexfrgxctrl4.rsflexfrgxctrl5.rsflexfrgxctrl6.rsflexfrgxctrl7.rsfmccr.rsfmcflush.rsfrohfdiv.rsgpiopsync.rshslspiclksel.rskey_block.rsmainclksela.rsmainclkselb.rsmclkclksel.rsmclkdiv.rsmclkio.rsmemoryremap.rsnmisrc.rspll0clkdiv.rspll0clksel.rspll0ctrl.rspll0ndec.rspll0pdec.rspll0sscg0.rspll0sscg1.rspll0stat.rspll1clksel.rspll1ctrl.rspll1mdec.rspll1ndec.rspll1pdec.rspll1stat.rspresetctrl0.rspresetctrl1.rspresetctrl2.rspresetctrlclr.rspresetctrlset.rssctclkdiv.rssctclksel.rssdioclkctrl.rssdioclkdiv.rssdioclksel.rsswr_reset.rssystickclkdiv0.rssystickclkdiv1.rssystickclksel0.rssystickclksel1.rssystickclkselx0.rssystickclkselx1.rstraceclkdiv.rstraceclksel.rsusb0clkdiv.rsusb0clksel.rsusb0needclkctrl.rsusb0needclkstat.rsusb1needclkctrl.rsusb1needclkstat.rswdtclkdiv.rs
sysctl
usart0
usb1
usbfsh
usbhsh
usbphy
utick0
wwdt
nb
r0
stable_deref_trait
typenum
usb_device
usbd_serial
vcell
void
volatile_register
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - This register contains the offset value towards the start of the operational register space and the version number of the IP block"]
    pub caplength_chipid: CAPLENGTH_CHIPID,
    #[doc = "0x04 - Host Controller Structural Parameters"]
    pub hcsparams: HCSPARAMS,
    _reserved2: [u8; 4usize],
    #[doc = "0x0c - Frame Length Adjustment"]
    pub fladj_frindex: FLADJ_FRINDEX,
    #[doc = "0x10 - Memory base address where ATL PTD0 is stored"]
    pub atlptd: ATLPTD,
    #[doc = "0x14 - Memory base address where ISO PTD0 is stored"]
    pub isoptd: ISOPTD,
    #[doc = "0x18 - Memory base address where INT PTD0 is stored"]
    pub intptd: INTPTD,
    #[doc = "0x1c - Memory base address that indicates the start of the data payload buffers"]
    pub datapayload: DATAPAYLOAD,
    #[doc = "0x20 - USB Command register"]
    pub usbcmd: USBCMD,
    #[doc = "0x24 - USB Interrupt Status register"]
    pub usbsts: USBSTS,
    #[doc = "0x28 - USB Interrupt Enable register"]
    pub usbintr: USBINTR,
    #[doc = "0x2c - Port Status and Control register"]
    pub portsc1: PORTSC1,
    #[doc = "0x30 - Done map for each ATL PTD"]
    pub atlptdd: ATLPTDD,
    #[doc = "0x34 - Skip map for each ATL PTD"]
    pub atlptds: ATLPTDS,
    #[doc = "0x38 - Done map for each ISO PTD"]
    pub isoptdd: ISOPTDD,
    #[doc = "0x3c - Skip map for each ISO PTD"]
    pub isoptds: ISOPTDS,
    #[doc = "0x40 - Done map for each INT PTD"]
    pub intptdd: INTPTDD,
    #[doc = "0x44 - Skip map for each INT PTD"]
    pub intptds: INTPTDS,
    #[doc = "0x48 - Marks the last PTD in the list for ISO, INT and ATL"]
    pub lastptd: LASTPTD,
    _reserved18: [u8; 4usize],
    #[doc = "0x50 - Controls the port if it is attached to the host block or the device block"]
    pub portmode: PORTMODE,
}
#[doc = "This register contains the offset value towards the start of the operational register space and the version number of the IP block\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [caplength_chipid](caplength_chipid) module"]
pub type CAPLENGTH_CHIPID = crate::Reg<u32, _CAPLENGTH_CHIPID>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _CAPLENGTH_CHIPID;
#[doc = "`read()` method returns [caplength_chipid::R](caplength_chipid::R) reader structure"]
impl crate::Readable for CAPLENGTH_CHIPID {}
#[doc = "This register contains the offset value towards the start of the operational register space and the version number of the IP block"]
pub mod caplength_chipid;
#[doc = "Host Controller Structural Parameters\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hcsparams](hcsparams) module"]
pub type HCSPARAMS = crate::Reg<u32, _HCSPARAMS>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _HCSPARAMS;
#[doc = "`read()` method returns [hcsparams::R](hcsparams::R) reader structure"]
impl crate::Readable for HCSPARAMS {}
#[doc = "Host Controller Structural Parameters"]
pub mod hcsparams;
#[doc = "Frame Length Adjustment\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fladj_frindex](fladj_frindex) module"]
pub type FLADJ_FRINDEX = crate::Reg<u32, _FLADJ_FRINDEX>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _FLADJ_FRINDEX;
#[doc = "`read()` method returns [fladj_frindex::R](fladj_frindex::R) reader structure"]
impl crate::Readable for FLADJ_FRINDEX {}
#[doc = "`write(|w| ..)` method takes [fladj_frindex::W](fladj_frindex::W) writer structure"]
impl crate::Writable for FLADJ_FRINDEX {}
#[doc = "Frame Length Adjustment"]
pub mod fladj_frindex;
#[doc = "Memory base address where ATL PTD0 is stored\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [atlptd](atlptd) module"]
pub type ATLPTD = crate::Reg<u32, _ATLPTD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ATLPTD;
#[doc = "`read()` method returns [atlptd::R](atlptd::R) reader structure"]
impl crate::Readable for ATLPTD {}
#[doc = "`write(|w| ..)` method takes [atlptd::W](atlptd::W) writer structure"]
impl crate::Writable for ATLPTD {}
#[doc = "Memory base address where ATL PTD0 is stored"]
pub mod atlptd;
#[doc = "Memory base address where ISO PTD0 is stored\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isoptd](isoptd) module"]
pub type ISOPTD = crate::Reg<u32, _ISOPTD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ISOPTD;
#[doc = "`read()` method returns [isoptd::R](isoptd::R) reader structure"]
impl crate::Readable for ISOPTD {}
#[doc = "`write(|w| ..)` method takes [isoptd::W](isoptd::W) writer structure"]
impl crate::Writable for ISOPTD {}
#[doc = "Memory base address where ISO PTD0 is stored"]
pub mod isoptd;
#[doc = "Memory base address where INT PTD0 is stored\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intptd](intptd) module"]
pub type INTPTD = crate::Reg<u32, _INTPTD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _INTPTD;
#[doc = "`read()` method returns [intptd::R](intptd::R) reader structure"]
impl crate::Readable for INTPTD {}
#[doc = "`write(|w| ..)` method takes [intptd::W](intptd::W) writer structure"]
impl crate::Writable for INTPTD {}
#[doc = "Memory base address where INT PTD0 is stored"]
pub mod intptd;
#[doc = "Memory base address that indicates the start of the data payload buffers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [datapayload](datapayload) module"]
pub type DATAPAYLOAD = crate::Reg<u32, _DATAPAYLOAD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _DATAPAYLOAD;
#[doc = "`read()` method returns [datapayload::R](datapayload::R) reader structure"]
impl crate::Readable for DATAPAYLOAD {}
#[doc = "`write(|w| ..)` method takes [datapayload::W](datapayload::W) writer structure"]
impl crate::Writable for DATAPAYLOAD {}
#[doc = "Memory base address that indicates the start of the data payload buffers"]
pub mod datapayload;
#[doc = "USB Command register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbcmd](usbcmd) module"]
pub type USBCMD = crate::Reg<u32, _USBCMD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _USBCMD;
#[doc = "`read()` method returns [usbcmd::R](usbcmd::R) reader structure"]
impl crate::Readable for USBCMD {}
#[doc = "`write(|w| ..)` method takes [usbcmd::W](usbcmd::W) writer structure"]
impl crate::Writable for USBCMD {}
#[doc = "USB Command register"]
pub mod usbcmd;
#[doc = "USB Interrupt Status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbsts](usbsts) module"]
pub type USBSTS = crate::Reg<u32, _USBSTS>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _USBSTS;
#[doc = "`read()` method returns [usbsts::R](usbsts::R) reader structure"]
impl crate::Readable for USBSTS {}
#[doc = "`write(|w| ..)` method takes [usbsts::W](usbsts::W) writer structure"]
impl crate::Writable for USBSTS {}
#[doc = "USB Interrupt Status register"]
pub mod usbsts;
#[doc = "USB Interrupt Enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbintr](usbintr) module"]
pub type USBINTR = crate::Reg<u32, _USBINTR>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _USBINTR;
#[doc = "`read()` method returns [usbintr::R](usbintr::R) reader structure"]
impl crate::Readable for USBINTR {}
#[doc = "`write(|w| ..)` method takes [usbintr::W](usbintr::W) writer structure"]
impl crate::Writable for USBINTR {}
#[doc = "USB Interrupt Enable register"]
pub mod usbintr;
#[doc = "Port Status and Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portsc1](portsc1) module"]
pub type PORTSC1 = crate::Reg<u32, _PORTSC1>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _PORTSC1;
#[doc = "`read()` method returns [portsc1::R](portsc1::R) reader structure"]
impl crate::Readable for PORTSC1 {}
#[doc = "`write(|w| ..)` method takes [portsc1::W](portsc1::W) writer structure"]
impl crate::Writable for PORTSC1 {}
#[doc = "Port Status and Control register"]
pub mod portsc1;
#[doc = "Done map for each ATL PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [atlptdd](atlptdd) module"]
pub type ATLPTDD = crate::Reg<u32, _ATLPTDD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ATLPTDD;
#[doc = "`read()` method returns [atlptdd::R](atlptdd::R) reader structure"]
impl crate::Readable for ATLPTDD {}
#[doc = "`write(|w| ..)` method takes [atlptdd::W](atlptdd::W) writer structure"]
impl crate::Writable for ATLPTDD {}
#[doc = "Done map for each ATL PTD"]
pub mod atlptdd;
#[doc = "Skip map for each ATL PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [atlptds](atlptds) module"]
pub type ATLPTDS = crate::Reg<u32, _ATLPTDS>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ATLPTDS;
#[doc = "`read()` method returns [atlptds::R](atlptds::R) reader structure"]
impl crate::Readable for ATLPTDS {}
#[doc = "`write(|w| ..)` method takes [atlptds::W](atlptds::W) writer structure"]
impl crate::Writable for ATLPTDS {}
#[doc = "Skip map for each ATL PTD"]
pub mod atlptds;
#[doc = "Done map for each ISO PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isoptdd](isoptdd) module"]
pub type ISOPTDD = crate::Reg<u32, _ISOPTDD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ISOPTDD;
#[doc = "`read()` method returns [isoptdd::R](isoptdd::R) reader structure"]
impl crate::Readable for ISOPTDD {}
#[doc = "`write(|w| ..)` method takes [isoptdd::W](isoptdd::W) writer structure"]
impl crate::Writable for ISOPTDD {}
#[doc = "Done map for each ISO PTD"]
pub mod isoptdd;
#[doc = "Skip map for each ISO PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isoptds](isoptds) module"]
pub type ISOPTDS = crate::Reg<u32, _ISOPTDS>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ISOPTDS;
#[doc = "`read()` method returns [isoptds::R](isoptds::R) reader structure"]
impl crate::Readable for ISOPTDS {}
#[doc = "`write(|w| ..)` method takes [isoptds::W](isoptds::W) writer structure"]
impl crate::Writable for ISOPTDS {}
#[doc = "Skip map for each ISO PTD"]
pub mod isoptds;
#[doc = "Done map for each INT PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intptdd](intptdd) module"]
pub type INTPTDD = crate::Reg<u32, _INTPTDD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _INTPTDD;
#[doc = "`read()` method returns [intptdd::R](intptdd::R) reader structure"]
impl crate::Readable for INTPTDD {}
#[doc = "`write(|w| ..)` method takes [intptdd::W](intptdd::W) writer structure"]
impl crate::Writable for INTPTDD {}
#[doc = "Done map for each INT PTD"]
pub mod intptdd;
#[doc = "Skip map for each INT PTD\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intptds](intptds) module"]
pub type INTPTDS = crate::Reg<u32, _INTPTDS>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _INTPTDS;
#[doc = "`read()` method returns [intptds::R](intptds::R) reader structure"]
impl crate::Readable for INTPTDS {}
#[doc = "`write(|w| ..)` method takes [intptds::W](intptds::W) writer structure"]
impl crate::Writable for INTPTDS {}
#[doc = "Skip map for each INT PTD"]
pub mod intptds;
#[doc = "Marks the last PTD in the list for ISO, INT and ATL\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lastptd](lastptd) module"]
pub type LASTPTD = crate::Reg<u32, _LASTPTD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _LASTPTD;
#[doc = "`read()` method returns [lastptd::R](lastptd::R) reader structure"]
impl crate::Readable for LASTPTD {}
#[doc = "`write(|w| ..)` method takes [lastptd::W](lastptd::W) writer structure"]
impl crate::Writable for LASTPTD {}
#[doc = "Marks the last PTD in the list for ISO, INT and ATL"]
pub mod lastptd;
#[doc = "Controls the port if it is attached to the host block or the device block\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portmode](portmode) module"]
pub type PORTMODE = crate::Reg<u32, _PORTMODE>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _PORTMODE;
#[doc = "`read()` method returns [portmode::R](portmode::R) reader structure"]
impl crate::Readable for PORTMODE {}
#[doc = "`write(|w| ..)` method takes [portmode::W](portmode::W) writer structure"]
impl crate::Writable for PORTMODE {}
#[doc = "Controls the port if it is attached to the host block or the device block"]
pub mod portmode;