Files
aligned
as_slice
bare_metal
bitfield
block_buffer
block_cipher
cortex_m
cortex_m_rt
cortex_m_semihosting
digest
embedded_hal
generic_array
lpc55_hal
lpc55_pac
adc0
ahb_secure_ctrl
anactrl
casper
crc_engine
ctimer0
dbgmailbox
dma0
flash
flash_cfpa0
cmpa_prog_in_progress.rscustomer_defined.rsdcfg_cc_socu_dflt.rsdcfg_cc_socu_pin.rsenable_fa_mode.rsheader.rsimage_key_revoke.rsns_fw_version.rsprince_region0_iv_body0.rsprince_region0_iv_body1.rsprince_region0_iv_body10.rsprince_region0_iv_body11.rsprince_region0_iv_body2.rsprince_region0_iv_body3.rsprince_region0_iv_body4.rsprince_region0_iv_body5.rsprince_region0_iv_body6.rsprince_region0_iv_body7.rsprince_region0_iv_body8.rsprince_region0_iv_body9.rsprince_region0_iv_code0.rsprince_region0_iv_code1.rsprince_region0_iv_code10.rsprince_region0_iv_code11.rsprince_region0_iv_code12.rsprince_region0_iv_code13.rsprince_region0_iv_code2.rsprince_region0_iv_code3.rsprince_region0_iv_code4.rsprince_region0_iv_code5.rsprince_region0_iv_code6.rsprince_region0_iv_code7.rsprince_region0_iv_code8.rsprince_region0_iv_code9.rsprince_region0_iv_header0.rsprince_region0_iv_header1.rsprince_region1_iv_body0.rsprince_region1_iv_body1.rsprince_region1_iv_body10.rsprince_region1_iv_body11.rsprince_region1_iv_body2.rsprince_region1_iv_body3.rsprince_region1_iv_body4.rsprince_region1_iv_body5.rsprince_region1_iv_body6.rsprince_region1_iv_body7.rsprince_region1_iv_body8.rsprince_region1_iv_body9.rsprince_region1_iv_code0.rsprince_region1_iv_code1.rsprince_region1_iv_code10.rsprince_region1_iv_code11.rsprince_region1_iv_code12.rsprince_region1_iv_code13.rsprince_region1_iv_code2.rsprince_region1_iv_code3.rsprince_region1_iv_code4.rsprince_region1_iv_code5.rsprince_region1_iv_code6.rsprince_region1_iv_code7.rsprince_region1_iv_code8.rsprince_region1_iv_code9.rsprince_region1_iv_header0.rsprince_region1_iv_header1.rsprince_region2_iv_body0.rsprince_region2_iv_body1.rsprince_region2_iv_body10.rsprince_region2_iv_body11.rsprince_region2_iv_body2.rsprince_region2_iv_body3.rsprince_region2_iv_body4.rsprince_region2_iv_body5.rsprince_region2_iv_body6.rsprince_region2_iv_body7.rsprince_region2_iv_body8.rsprince_region2_iv_body9.rsprince_region2_iv_code0.rsprince_region2_iv_code1.rsprince_region2_iv_code10.rsprince_region2_iv_code11.rsprince_region2_iv_code12.rsprince_region2_iv_code13.rsprince_region2_iv_code2.rsprince_region2_iv_code3.rsprince_region2_iv_code4.rsprince_region2_iv_code5.rsprince_region2_iv_code6.rsprince_region2_iv_code7.rsprince_region2_iv_code8.rsprince_region2_iv_code9.rsprince_region2_iv_header0.rsprince_region2_iv_header1.rsrotkh_revoke.rss_fw_version.rssha256_digest.rsvendor_usage.rsversion.rs
flash_cmpa
flash_key_store
activation_code.rsheader.rsprince_region0_body0.rsprince_region0_body1.rsprince_region0_body10.rsprince_region0_body11.rsprince_region0_body2.rsprince_region0_body3.rsprince_region0_body4.rsprince_region0_body5.rsprince_region0_body6.rsprince_region0_body7.rsprince_region0_body8.rsprince_region0_body9.rsprince_region0_header0.rsprince_region0_header1.rsprince_region0_key_code0.rsprince_region0_key_code1.rsprince_region0_key_code10.rsprince_region0_key_code11.rsprince_region0_key_code12.rsprince_region0_key_code13.rsprince_region0_key_code2.rsprince_region0_key_code3.rsprince_region0_key_code4.rsprince_region0_key_code5.rsprince_region0_key_code6.rsprince_region0_key_code7.rsprince_region0_key_code8.rsprince_region0_key_code9.rsprince_region1_body0.rsprince_region1_body1.rsprince_region1_body10.rsprince_region1_body11.rsprince_region1_body2.rsprince_region1_body3.rsprince_region1_body4.rsprince_region1_body5.rsprince_region1_body6.rsprince_region1_body7.rsprince_region1_body8.rsprince_region1_body9.rsprince_region1_header0.rsprince_region1_header1.rsprince_region1_key_code0.rsprince_region1_key_code1.rsprince_region1_key_code10.rsprince_region1_key_code11.rsprince_region1_key_code12.rsprince_region1_key_code13.rsprince_region1_key_code2.rsprince_region1_key_code3.rsprince_region1_key_code4.rsprince_region1_key_code5.rsprince_region1_key_code6.rsprince_region1_key_code7.rsprince_region1_key_code8.rsprince_region1_key_code9.rsprince_region2_body0.rsprince_region2_body1.rsprince_region2_body10.rsprince_region2_body11.rsprince_region2_body2.rsprince_region2_body3.rsprince_region2_body4.rsprince_region2_body5.rsprince_region2_body6.rsprince_region2_body7.rsprince_region2_body8.rsprince_region2_body9.rsprince_region2_header0.rsprince_region2_header1.rsprince_region2_key_code0.rsprince_region2_key_code1.rsprince_region2_key_code10.rsprince_region2_key_code11.rsprince_region2_key_code12.rsprince_region2_key_code13.rsprince_region2_key_code2.rsprince_region2_key_code3.rsprince_region2_key_code4.rsprince_region2_key_code5.rsprince_region2_key_code6.rsprince_region2_key_code7.rsprince_region2_key_code8.rsprince_region2_key_code9.rspuf_discharge_time_in_ms.rssbkey_body0.rssbkey_body1.rssbkey_body10.rssbkey_body11.rssbkey_body2.rssbkey_body3.rssbkey_body4.rssbkey_body5.rssbkey_body6.rssbkey_body7.rssbkey_body8.rssbkey_body9.rssbkey_header0.rssbkey_header1.rssbkey_key_code0.rssbkey_key_code1.rssbkey_key_code10.rssbkey_key_code11.rssbkey_key_code12.rssbkey_key_code13.rssbkey_key_code2.rssbkey_key_code3.rssbkey_key_code4.rssbkey_key_code5.rssbkey_key_code6.rssbkey_key_code7.rssbkey_key_code8.rssbkey_key_code9.rsuds_body0.rsuds_body1.rsuds_body10.rsuds_body11.rsuds_body2.rsuds_body3.rsuds_body4.rsuds_body5.rsuds_body6.rsuds_body7.rsuds_body8.rsuds_body9.rsuds_header0.rsuds_header1.rsuds_key_code0.rsuds_key_code1.rsuds_key_code10.rsuds_key_code11.rsuds_key_code12.rsuds_key_code13.rsuds_key_code2.rsuds_key_code3.rsuds_key_code4.rsuds_key_code5.rsuds_key_code6.rsuds_key_code7.rsuds_key_code8.rsuds_key_code9.rsuser_kek_body0.rsuser_kek_body1.rsuser_kek_body10.rsuser_kek_body11.rsuser_kek_body2.rsuser_kek_body3.rsuser_kek_body4.rsuser_kek_body5.rsuser_kek_body6.rsuser_kek_body7.rsuser_kek_body8.rsuser_kek_body9.rsuser_kek_header0.rsuser_kek_header1.rsuser_kek_key_code0.rsuser_kek_key_code1.rsuser_kek_key_code10.rsuser_kek_key_code11.rsuser_kek_key_code12.rsuser_kek_key_code13.rsuser_kek_key_code2.rsuser_kek_key_code3.rsuser_kek_key_code4.rsuser_kek_key_code5.rsuser_kek_key_code6.rsuser_kek_key_code7.rsuser_kek_key_code8.rsuser_kek_key_code9.rs
flexcomm0
gint0
gpio
hashcrypt
i2c0
i2s0
inputmux
iocon
mailbox
mrt0
ostimer
pint
plu
pmc
powerquad
prince
puf
rng
rtc
sau
scn_scb
sct0
sdif
secgpio
spi0
syscon
adcclkdiv.rsadcclksel.rsahbclkctrl0.rsahbclkctrl1.rsahbclkctrl2.rsahbclkctrlclr.rsahbclkctrlset.rsahbclkdiv.rsahbmatprio.rsautoclkgateoverride.rsclkoutdiv.rsclkoutsel.rsclock_ctrl.rsclockgenupdatelockout.rscomp_int_ctrl.rscomp_int_status.rscpboot.rscpstat.rscpu0nstckcal.rscpu0stckcal.rscpu1stckcal.rscpucfg.rscpuctrl.rsctimerclksel0.rsctimerclksel1.rsctimerclksel2.rsctimerclksel3.rsctimerclksel4.rsctimerclkselx0.rsctimerclkselx1.rsctimerclkselx2.rsctimerclkselx3.rsctimerclkselx4.rsdebug_auth_beacon.rsdebug_features.rsdebug_features_dp.rsdebug_lock_en.rsdevice_id0.rsdieid.rsfcclksel0.rsfcclksel1.rsfcclksel2.rsfcclksel3.rsfcclksel4.rsfcclksel5.rsfcclksel6.rsfcclksel7.rsfcclkselx0.rsfcclkselx1.rsfcclkselx2.rsfcclkselx3.rsfcclkselx4.rsfcclkselx5.rsfcclkselx6.rsfcclkselx7.rsflexfrg0ctrl.rsflexfrg1ctrl.rsflexfrg2ctrl.rsflexfrg3ctrl.rsflexfrg4ctrl.rsflexfrg5ctrl.rsflexfrg6ctrl.rsflexfrg7ctrl.rsflexfrgxctrl0.rsflexfrgxctrl1.rsflexfrgxctrl2.rsflexfrgxctrl3.rsflexfrgxctrl4.rsflexfrgxctrl5.rsflexfrgxctrl6.rsflexfrgxctrl7.rsfmccr.rsfmcflush.rsfrohfdiv.rsgpiopsync.rshslspiclksel.rskey_block.rsmainclksela.rsmainclkselb.rsmclkclksel.rsmclkdiv.rsmclkio.rsmemoryremap.rsnmisrc.rspll0clkdiv.rspll0clksel.rspll0ctrl.rspll0ndec.rspll0pdec.rspll0sscg0.rspll0sscg1.rspll0stat.rspll1clksel.rspll1ctrl.rspll1mdec.rspll1ndec.rspll1pdec.rspll1stat.rspresetctrl0.rspresetctrl1.rspresetctrl2.rspresetctrlclr.rspresetctrlset.rssctclkdiv.rssctclksel.rssdioclkctrl.rssdioclkdiv.rssdioclksel.rsswr_reset.rssystickclkdiv0.rssystickclkdiv1.rssystickclksel0.rssystickclksel1.rssystickclkselx0.rssystickclkselx1.rstraceclkdiv.rstraceclksel.rsusb0clkdiv.rsusb0clksel.rsusb0needclkctrl.rsusb0needclkstat.rsusb1needclkctrl.rsusb1needclkstat.rswdtclkdiv.rs
sysctl
usart0
usb1
usbfsh
usbhsh
usbphy
utick0
wwdt
nb
r0
stable_deref_trait
typenum
usb_device
usbd_serial
vcell
void
volatile_register
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#[doc = "Reader of register DMA1_ITRIG_INMUX[%s]"]
pub type R = crate::R<u32, super::DMA1_ITRIG_INMUX>;
#[doc = "Writer for register DMA1_ITRIG_INMUX[%s]"]
pub type W = crate::W<u32, super::DMA1_ITRIG_INMUX>;
#[doc = "Register DMA1_ITRIG_INMUX[%s]
`reset()`'s with value 0x0f"]
impl crate::ResetValue for super::DMA1_ITRIG_INMUX {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0x0f
    }
}
#[doc = "Trigger input number (decimal value) for DMA channel n (n = 0 to 9).\n\nValue on reset: 15"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum INP_A {
    #[doc = "0: Pin interrupt 0"]
    VAL0 = 0,
    #[doc = "1: Pin interrupt 1"]
    VAL1 = 1,
    #[doc = "2: Pin interrupt 2"]
    VAL2 = 2,
    #[doc = "3: Pin interrupt 3"]
    VAL3 = 3,
    #[doc = "4: Timer CTIMER0 Match 0"]
    VAL4 = 4,
    #[doc = "5: Timer CTIMER0 Match 1"]
    VAL5 = 5,
    #[doc = "6: Timer CTIMER2 Match 0"]
    VAL6 = 6,
    #[doc = "7: Timer CTIMER4 Match 0"]
    VAL7 = 7,
    #[doc = "8: DMA1 output trigger mux 0"]
    VAL8 = 8,
    #[doc = "9: DMA1 output trigger mux 1"]
    VAL9 = 9,
    #[doc = "10: DMA1 output trigger mux 2"]
    VAL10 = 10,
    #[doc = "11: DMA1 output trigger mux 3"]
    VAL11 = 11,
    #[doc = "12: SCT0 DMA request 0"]
    VAL12 = 12,
    #[doc = "13: SCT0 DMA request 1"]
    VAL13 = 13,
    #[doc = "14: HASH DMA RX trigger"]
    VAL14 = 14,
    #[doc = "15: None"]
    VAL15 = 15,
}
impl From<INP_A> for u8 {
    #[inline(always)]
    fn from(variant: INP_A) -> Self {
        variant as _
    }
}
#[doc = "Reader of field `INP`"]
pub type INP_R = crate::R<u8, INP_A>;
impl INP_R {
    #[doc = r"Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> INP_A {
        match self.bits {
            0 => INP_A::VAL0,
            1 => INP_A::VAL1,
            2 => INP_A::VAL2,
            3 => INP_A::VAL3,
            4 => INP_A::VAL4,
            5 => INP_A::VAL5,
            6 => INP_A::VAL6,
            7 => INP_A::VAL7,
            8 => INP_A::VAL8,
            9 => INP_A::VAL9,
            10 => INP_A::VAL10,
            11 => INP_A::VAL11,
            12 => INP_A::VAL12,
            13 => INP_A::VAL13,
            14 => INP_A::VAL14,
            15 => INP_A::VAL15,
            _ => unreachable!(),
        }
    }
    #[doc = "Checks if the value of the field is `VAL0`"]
    #[inline(always)]
    pub fn is_val0(&self) -> bool {
        *self == INP_A::VAL0
    }
    #[doc = "Checks if the value of the field is `VAL1`"]
    #[inline(always)]
    pub fn is_val1(&self) -> bool {
        *self == INP_A::VAL1
    }
    #[doc = "Checks if the value of the field is `VAL2`"]
    #[inline(always)]
    pub fn is_val2(&self) -> bool {
        *self == INP_A::VAL2
    }
    #[doc = "Checks if the value of the field is `VAL3`"]
    #[inline(always)]
    pub fn is_val3(&self) -> bool {
        *self == INP_A::VAL3
    }
    #[doc = "Checks if the value of the field is `VAL4`"]
    #[inline(always)]
    pub fn is_val4(&self) -> bool {
        *self == INP_A::VAL4
    }
    #[doc = "Checks if the value of the field is `VAL5`"]
    #[inline(always)]
    pub fn is_val5(&self) -> bool {
        *self == INP_A::VAL5
    }
    #[doc = "Checks if the value of the field is `VAL6`"]
    #[inline(always)]
    pub fn is_val6(&self) -> bool {
        *self == INP_A::VAL6
    }
    #[doc = "Checks if the value of the field is `VAL7`"]
    #[inline(always)]
    pub fn is_val7(&self) -> bool {
        *self == INP_A::VAL7
    }
    #[doc = "Checks if the value of the field is `VAL8`"]
    #[inline(always)]
    pub fn is_val8(&self) -> bool {
        *self == INP_A::VAL8
    }
    #[doc = "Checks if the value of the field is `VAL9`"]
    #[inline(always)]
    pub fn is_val9(&self) -> bool {
        *self == INP_A::VAL9
    }
    #[doc = "Checks if the value of the field is `VAL10`"]
    #[inline(always)]
    pub fn is_val10(&self) -> bool {
        *self == INP_A::VAL10
    }
    #[doc = "Checks if the value of the field is `VAL11`"]
    #[inline(always)]
    pub fn is_val11(&self) -> bool {
        *self == INP_A::VAL11
    }
    #[doc = "Checks if the value of the field is `VAL12`"]
    #[inline(always)]
    pub fn is_val12(&self) -> bool {
        *self == INP_A::VAL12
    }
    #[doc = "Checks if the value of the field is `VAL13`"]
    #[inline(always)]
    pub fn is_val13(&self) -> bool {
        *self == INP_A::VAL13
    }
    #[doc = "Checks if the value of the field is `VAL14`"]
    #[inline(always)]
    pub fn is_val14(&self) -> bool {
        *self == INP_A::VAL14
    }
    #[doc = "Checks if the value of the field is `VAL15`"]
    #[inline(always)]
    pub fn is_val15(&self) -> bool {
        *self == INP_A::VAL15
    }
}
#[doc = "Write proxy for field `INP`"]
pub struct INP_W<'a> {
    w: &'a mut W,
}
impl<'a> INP_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: INP_A) -> &'a mut W {
        {
            self.bits(variant.into())
        }
    }
    #[doc = "Pin interrupt 0"]
    #[inline(always)]
    pub fn val0(self) -> &'a mut W {
        self.variant(INP_A::VAL0)
    }
    #[doc = "Pin interrupt 1"]
    #[inline(always)]
    pub fn val1(self) -> &'a mut W {
        self.variant(INP_A::VAL1)
    }
    #[doc = "Pin interrupt 2"]
    #[inline(always)]
    pub fn val2(self) -> &'a mut W {
        self.variant(INP_A::VAL2)
    }
    #[doc = "Pin interrupt 3"]
    #[inline(always)]
    pub fn val3(self) -> &'a mut W {
        self.variant(INP_A::VAL3)
    }
    #[doc = "Timer CTIMER0 Match 0"]
    #[inline(always)]
    pub fn val4(self) -> &'a mut W {
        self.variant(INP_A::VAL4)
    }
    #[doc = "Timer CTIMER0 Match 1"]
    #[inline(always)]
    pub fn val5(self) -> &'a mut W {
        self.variant(INP_A::VAL5)
    }
    #[doc = "Timer CTIMER2 Match 0"]
    #[inline(always)]
    pub fn val6(self) -> &'a mut W {
        self.variant(INP_A::VAL6)
    }
    #[doc = "Timer CTIMER4 Match 0"]
    #[inline(always)]
    pub fn val7(self) -> &'a mut W {
        self.variant(INP_A::VAL7)
    }
    #[doc = "DMA1 output trigger mux 0"]
    #[inline(always)]
    pub fn val8(self) -> &'a mut W {
        self.variant(INP_A::VAL8)
    }
    #[doc = "DMA1 output trigger mux 1"]
    #[inline(always)]
    pub fn val9(self) -> &'a mut W {
        self.variant(INP_A::VAL9)
    }
    #[doc = "DMA1 output trigger mux 2"]
    #[inline(always)]
    pub fn val10(self) -> &'a mut W {
        self.variant(INP_A::VAL10)
    }
    #[doc = "DMA1 output trigger mux 3"]
    #[inline(always)]
    pub fn val11(self) -> &'a mut W {
        self.variant(INP_A::VAL11)
    }
    #[doc = "SCT0 DMA request 0"]
    #[inline(always)]
    pub fn val12(self) -> &'a mut W {
        self.variant(INP_A::VAL12)
    }
    #[doc = "SCT0 DMA request 1"]
    #[inline(always)]
    pub fn val13(self) -> &'a mut W {
        self.variant(INP_A::VAL13)
    }
    #[doc = "HASH DMA RX trigger"]
    #[inline(always)]
    pub fn val14(self) -> &'a mut W {
        self.variant(INP_A::VAL14)
    }
    #[doc = "None"]
    #[inline(always)]
    pub fn val15(self) -> &'a mut W {
        self.variant(INP_A::VAL15)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:3 - Trigger input number (decimal value) for DMA channel n (n = 0 to 9)."]
    #[inline(always)]
    pub fn inp(&self) -> INP_R {
        INP_R::new((self.bits & 0x0f) as u8)
    }
}
impl W {
    #[doc = "Bits 0:3 - Trigger input number (decimal value) for DMA channel n (n = 0 to 9)."]
    #[inline(always)]
    pub fn inp(&mut self) -> INP_W {
        INP_W { w: self }
    }
}