[−][src]Struct lpc55_pac::SYSCON

pub struct SYSCON { /* fields omitted */ }

SYSCON

Implementations

`impl SYSCON`[src]

`pub const fn ptr() -> *const RegisterBlock`[src]

Returns a pointer to the register block

Methods from Deref<Target = RegisterBlock>

`pub fn systickclkselx0(&self) -> &SYSTICKCLKSELX0`[src]

0x260 - Peripheral reset control register

`pub fn systickclkselx0_mut(&self) -> &mut SYSTICKCLKSELX0`[src]

0x260 - Peripheral reset control register

`pub fn systickclksel0(&self) -> &SYSTICKCLKSEL0`[src]

0x260 - System Tick Timer for CPU0 source select

`pub fn systickclksel0_mut(&self) -> &mut SYSTICKCLKSEL0`[src]

0x260 - System Tick Timer for CPU0 source select

`pub fn systickclkselx1(&self) -> &SYSTICKCLKSELX1`[src]

0x264 - Peripheral reset control register

`pub fn systickclkselx1_mut(&self) -> &mut SYSTICKCLKSELX1`[src]

0x264 - Peripheral reset control register

`pub fn systickclksel1(&self) -> &SYSTICKCLKSEL1`[src]

0x264 - System Tick Timer for CPU1 source select

`pub fn systickclksel1_mut(&self) -> &mut SYSTICKCLKSEL1`[src]

0x264 - System Tick Timer for CPU1 source select

`pub fn ctimerclkselx0(&self) -> &CTIMERCLKSELX0`[src]

0x26c - Peripheral reset control register

`pub fn ctimerclkselx0_mut(&self) -> &mut CTIMERCLKSELX0`[src]

0x26c - Peripheral reset control register

`pub fn ctimerclksel0(&self) -> &CTIMERCLKSEL0`[src]

0x26c - CTimer 0 clock source select

`pub fn ctimerclksel0_mut(&self) -> &mut CTIMERCLKSEL0`[src]

0x26c - CTimer 0 clock source select

`pub fn ctimerclkselx1(&self) -> &CTIMERCLKSELX1`[src]

0x270 - Peripheral reset control register

`pub fn ctimerclkselx1_mut(&self) -> &mut CTIMERCLKSELX1`[src]

0x270 - Peripheral reset control register

`pub fn ctimerclksel1(&self) -> &CTIMERCLKSEL1`[src]

0x270 - CTimer 1 clock source select

`pub fn ctimerclksel1_mut(&self) -> &mut CTIMERCLKSEL1`[src]

0x270 - CTimer 1 clock source select

`pub fn ctimerclkselx2(&self) -> &CTIMERCLKSELX2`[src]

0x274 - Peripheral reset control register

`pub fn ctimerclkselx2_mut(&self) -> &mut CTIMERCLKSELX2`[src]

0x274 - Peripheral reset control register

`pub fn ctimerclksel2(&self) -> &CTIMERCLKSEL2`[src]

0x274 - CTimer 2 clock source select

`pub fn ctimerclksel2_mut(&self) -> &mut CTIMERCLKSEL2`[src]

0x274 - CTimer 2 clock source select

`pub fn ctimerclkselx3(&self) -> &CTIMERCLKSELX3`[src]

0x278 - Peripheral reset control register

`pub fn ctimerclkselx3_mut(&self) -> &mut CTIMERCLKSELX3`[src]

0x278 - Peripheral reset control register

`pub fn ctimerclksel3(&self) -> &CTIMERCLKSEL3`[src]

0x278 - CTimer 3 clock source select

`pub fn ctimerclksel3_mut(&self) -> &mut CTIMERCLKSEL3`[src]

0x278 - CTimer 3 clock source select

`pub fn ctimerclkselx4(&self) -> &CTIMERCLKSELX4`[src]

0x27c - Peripheral reset control register

`pub fn ctimerclkselx4_mut(&self) -> &mut CTIMERCLKSELX4`[src]

0x27c - Peripheral reset control register

`pub fn ctimerclksel4(&self) -> &CTIMERCLKSEL4`[src]

0x27c - CTimer 4 clock source select

`pub fn ctimerclksel4_mut(&self) -> &mut CTIMERCLKSEL4`[src]

0x27c - CTimer 4 clock source select

`pub fn fcclkselx0(&self) -> &FCCLKSELX0`[src]

0x2b0 - Peripheral reset control register

`pub fn fcclkselx0_mut(&self) -> &mut FCCLKSELX0`[src]

0x2b0 - Peripheral reset control register

`pub fn fcclksel0(&self) -> &FCCLKSEL0`[src]

0x2b0 - Flexcomm Interface 0 clock source select for Fractional Rate Divider

`pub fn fcclksel0_mut(&self) -> &mut FCCLKSEL0`[src]

0x2b0 - Flexcomm Interface 0 clock source select for Fractional Rate Divider

`pub fn fcclkselx1(&self) -> &FCCLKSELX1`[src]

0x2b4 - Peripheral reset control register

`pub fn fcclkselx1_mut(&self) -> &mut FCCLKSELX1`[src]

0x2b4 - Peripheral reset control register

`pub fn fcclksel1(&self) -> &FCCLKSEL1`[src]

0x2b4 - Flexcomm Interface 1 clock source select for Fractional Rate Divider

`pub fn fcclksel1_mut(&self) -> &mut FCCLKSEL1`[src]

0x2b4 - Flexcomm Interface 1 clock source select for Fractional Rate Divider

`pub fn fcclkselx2(&self) -> &FCCLKSELX2`[src]

0x2b8 - Peripheral reset control register

`pub fn fcclkselx2_mut(&self) -> &mut FCCLKSELX2`[src]

0x2b8 - Peripheral reset control register

`pub fn fcclksel2(&self) -> &FCCLKSEL2`[src]

0x2b8 - Flexcomm Interface 2 clock source select for Fractional Rate Divider

`pub fn fcclksel2_mut(&self) -> &mut FCCLKSEL2`[src]

0x2b8 - Flexcomm Interface 2 clock source select for Fractional Rate Divider

`pub fn fcclkselx3(&self) -> &FCCLKSELX3`[src]

0x2bc - Peripheral reset control register

`pub fn fcclkselx3_mut(&self) -> &mut FCCLKSELX3`[src]

0x2bc - Peripheral reset control register

`pub fn fcclksel3(&self) -> &FCCLKSEL3`[src]

0x2bc - Flexcomm Interface 3 clock source select for Fractional Rate Divider

`pub fn fcclksel3_mut(&self) -> &mut FCCLKSEL3`[src]

0x2bc - Flexcomm Interface 3 clock source select for Fractional Rate Divider

`pub fn fcclkselx4(&self) -> &FCCLKSELX4`[src]

0x2c0 - Peripheral reset control register

`pub fn fcclkselx4_mut(&self) -> &mut FCCLKSELX4`[src]

0x2c0 - Peripheral reset control register

`pub fn fcclksel4(&self) -> &FCCLKSEL4`[src]

0x2c0 - Flexcomm Interface 4 clock source select for Fractional Rate Divider

`pub fn fcclksel4_mut(&self) -> &mut FCCLKSEL4`[src]

0x2c0 - Flexcomm Interface 4 clock source select for Fractional Rate Divider

`pub fn fcclkselx5(&self) -> &FCCLKSELX5`[src]

0x2c4 - Peripheral reset control register

`pub fn fcclkselx5_mut(&self) -> &mut FCCLKSELX5`[src]

0x2c4 - Peripheral reset control register

`pub fn fcclksel5(&self) -> &FCCLKSEL5`[src]

0x2c4 - Flexcomm Interface 5 clock source select for Fractional Rate Divider

`pub fn fcclksel5_mut(&self) -> &mut FCCLKSEL5`[src]

0x2c4 - Flexcomm Interface 5 clock source select for Fractional Rate Divider

`pub fn fcclkselx6(&self) -> &FCCLKSELX6`[src]

0x2c8 - Peripheral reset control register

`pub fn fcclkselx6_mut(&self) -> &mut FCCLKSELX6`[src]

0x2c8 - Peripheral reset control register

`pub fn fcclksel6(&self) -> &FCCLKSEL6`[src]

0x2c8 - Flexcomm Interface 6 clock source select for Fractional Rate Divider

`pub fn fcclksel6_mut(&self) -> &mut FCCLKSEL6`[src]

0x2c8 - Flexcomm Interface 6 clock source select for Fractional Rate Divider

`pub fn fcclkselx7(&self) -> &FCCLKSELX7`[src]

0x2cc - Peripheral reset control register

`pub fn fcclkselx7_mut(&self) -> &mut FCCLKSELX7`[src]

0x2cc - Peripheral reset control register

`pub fn fcclksel7(&self) -> &FCCLKSEL7`[src]

0x2cc - Flexcomm Interface 7 clock source select for Fractional Rate Divider

`pub fn fcclksel7_mut(&self) -> &mut FCCLKSEL7`[src]

0x2cc - Flexcomm Interface 7 clock source select for Fractional Rate Divider

`pub fn flexfrgxctrl0(&self) -> &FLEXFRGXCTRL0`[src]

0x320 - Peripheral reset control register

`pub fn flexfrgxctrl0_mut(&self) -> &mut FLEXFRGXCTRL0`[src]

0x320 - Peripheral reset control register

`pub fn flexfrg0ctrl(&self) -> &FLEXFRG0CTRL`[src]

0x320 - Fractional rate divider for flexcomm 0

`pub fn flexfrg0ctrl_mut(&self) -> &mut FLEXFRG0CTRL`[src]

0x320 - Fractional rate divider for flexcomm 0

`pub fn flexfrgxctrl1(&self) -> &FLEXFRGXCTRL1`[src]

0x324 - Peripheral reset control register

`pub fn flexfrgxctrl1_mut(&self) -> &mut FLEXFRGXCTRL1`[src]

0x324 - Peripheral reset control register

`pub fn flexfrg1ctrl(&self) -> &FLEXFRG1CTRL`[src]

0x324 - Fractional rate divider for flexcomm 1

`pub fn flexfrg1ctrl_mut(&self) -> &mut FLEXFRG1CTRL`[src]

0x324 - Fractional rate divider for flexcomm 1

`pub fn flexfrgxctrl2(&self) -> &FLEXFRGXCTRL2`[src]

0x328 - Peripheral reset control register

`pub fn flexfrgxctrl2_mut(&self) -> &mut FLEXFRGXCTRL2`[src]

0x328 - Peripheral reset control register

`pub fn flexfrg2ctrl(&self) -> &FLEXFRG2CTRL`[src]

0x328 - Fractional rate divider for flexcomm 2

`pub fn flexfrg2ctrl_mut(&self) -> &mut FLEXFRG2CTRL`[src]

0x328 - Fractional rate divider for flexcomm 2

`pub fn flexfrgxctrl3(&self) -> &FLEXFRGXCTRL3`[src]

0x32c - Peripheral reset control register

`pub fn flexfrgxctrl3_mut(&self) -> &mut FLEXFRGXCTRL3`[src]

0x32c - Peripheral reset control register

`pub fn flexfrg3ctrl(&self) -> &FLEXFRG3CTRL`[src]

0x32c - Fractional rate divider for flexcomm 3

`pub fn flexfrg3ctrl_mut(&self) -> &mut FLEXFRG3CTRL`[src]

0x32c - Fractional rate divider for flexcomm 3

`pub fn flexfrgxctrl4(&self) -> &FLEXFRGXCTRL4`[src]

0x330 - Peripheral reset control register

`pub fn flexfrgxctrl4_mut(&self) -> &mut FLEXFRGXCTRL4`[src]

0x330 - Peripheral reset control register

`pub fn flexfrg4ctrl(&self) -> &FLEXFRG4CTRL`[src]

0x330 - Fractional rate divider for flexcomm 4

`pub fn flexfrg4ctrl_mut(&self) -> &mut FLEXFRG4CTRL`[src]

0x330 - Fractional rate divider for flexcomm 4

`pub fn flexfrgxctrl5(&self) -> &FLEXFRGXCTRL5`[src]

0x334 - Peripheral reset control register

`pub fn flexfrgxctrl5_mut(&self) -> &mut FLEXFRGXCTRL5`[src]

0x334 - Peripheral reset control register

`pub fn flexfrg5ctrl(&self) -> &FLEXFRG5CTRL`[src]

0x334 - Fractional rate divider for flexcomm 5

`pub fn flexfrg5ctrl_mut(&self) -> &mut FLEXFRG5CTRL`[src]

0x334 - Fractional rate divider for flexcomm 5

`pub fn flexfrgxctrl6(&self) -> &FLEXFRGXCTRL6`[src]

0x338 - Peripheral reset control register

`pub fn flexfrgxctrl6_mut(&self) -> &mut FLEXFRGXCTRL6`[src]

0x338 - Peripheral reset control register

`pub fn flexfrg6ctrl(&self) -> &FLEXFRG6CTRL`[src]

0x338 - Fractional rate divider for flexcomm 6

`pub fn flexfrg6ctrl_mut(&self) -> &mut FLEXFRG6CTRL`[src]

0x338 - Fractional rate divider for flexcomm 6

`pub fn flexfrgxctrl7(&self) -> &FLEXFRGXCTRL7`[src]

0x33c - Peripheral reset control register

`pub fn flexfrgxctrl7_mut(&self) -> &mut FLEXFRGXCTRL7`[src]

0x33c - Peripheral reset control register

`pub fn flexfrg7ctrl(&self) -> &FLEXFRG7CTRL`[src]

0x33c - Fractional rate divider for flexcomm 7

`pub fn flexfrg7ctrl_mut(&self) -> &mut FLEXFRG7CTRL`[src]

0x33c - Fractional rate divider for flexcomm 7

Trait Implementations

`impl Deref for SYSCON`[src]

`type Target = RegisterBlock`

The resulting type after dereferencing.

`fn deref(&self) -> &Self::Target`[src]

`impl Send for SYSCON`[src]

Auto Trait Implementations

`impl !Sync for SYSCON`

`impl Unpin for SYSCON`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`[src]

`type Output = T`

Should always be Self

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

[−][src]Struct lpc55_pac::SYSCON

Implementations

impl SYSCON[src]

pub const fn ptr() -> *const RegisterBlock[src]

Methods from Deref<Target = RegisterBlock>

pub fn systickclkselx0(&self) -> &SYSTICKCLKSELX0[src]

pub fn systickclkselx0_mut(&self) -> &mut SYSTICKCLKSELX0[src]

pub fn systickclksel0(&self) -> &SYSTICKCLKSEL0[src]

pub fn systickclksel0_mut(&self) -> &mut SYSTICKCLKSEL0[src]

pub fn systickclkselx1(&self) -> &SYSTICKCLKSELX1[src]

pub fn systickclkselx1_mut(&self) -> &mut SYSTICKCLKSELX1[src]

pub fn systickclksel1(&self) -> &SYSTICKCLKSEL1[src]

pub fn systickclksel1_mut(&self) -> &mut SYSTICKCLKSEL1[src]

pub fn ctimerclkselx0(&self) -> &CTIMERCLKSELX0[src]

pub fn ctimerclkselx0_mut(&self) -> &mut CTIMERCLKSELX0[src]

pub fn ctimerclksel0(&self) -> &CTIMERCLKSEL0[src]

pub fn ctimerclksel0_mut(&self) -> &mut CTIMERCLKSEL0[src]

pub fn ctimerclkselx1(&self) -> &CTIMERCLKSELX1[src]

pub fn ctimerclkselx1_mut(&self) -> &mut CTIMERCLKSELX1[src]

pub fn ctimerclksel1(&self) -> &CTIMERCLKSEL1[src]

pub fn ctimerclksel1_mut(&self) -> &mut CTIMERCLKSEL1[src]

pub fn ctimerclkselx2(&self) -> &CTIMERCLKSELX2[src]

pub fn ctimerclkselx2_mut(&self) -> &mut CTIMERCLKSELX2[src]

pub fn ctimerclksel2(&self) -> &CTIMERCLKSEL2[src]

pub fn ctimerclksel2_mut(&self) -> &mut CTIMERCLKSEL2[src]

pub fn ctimerclkselx3(&self) -> &CTIMERCLKSELX3[src]

pub fn ctimerclkselx3_mut(&self) -> &mut CTIMERCLKSELX3[src]

pub fn ctimerclksel3(&self) -> &CTIMERCLKSEL3[src]

pub fn ctimerclksel3_mut(&self) -> &mut CTIMERCLKSEL3[src]

pub fn ctimerclkselx4(&self) -> &CTIMERCLKSELX4[src]

pub fn ctimerclkselx4_mut(&self) -> &mut CTIMERCLKSELX4[src]

pub fn ctimerclksel4(&self) -> &CTIMERCLKSEL4[src]

pub fn ctimerclksel4_mut(&self) -> &mut CTIMERCLKSEL4[src]

pub fn fcclkselx0(&self) -> &FCCLKSELX0[src]

pub fn fcclkselx0_mut(&self) -> &mut FCCLKSELX0[src]

pub fn fcclksel0(&self) -> &FCCLKSEL0[src]

pub fn fcclksel0_mut(&self) -> &mut FCCLKSEL0[src]

pub fn fcclkselx1(&self) -> &FCCLKSELX1[src]

pub fn fcclkselx1_mut(&self) -> &mut FCCLKSELX1[src]

pub fn fcclksel1(&self) -> &FCCLKSEL1[src]

pub fn fcclksel1_mut(&self) -> &mut FCCLKSEL1[src]

pub fn fcclkselx2(&self) -> &FCCLKSELX2[src]

pub fn fcclkselx2_mut(&self) -> &mut FCCLKSELX2[src]

pub fn fcclksel2(&self) -> &FCCLKSEL2[src]

pub fn fcclksel2_mut(&self) -> &mut FCCLKSEL2[src]

pub fn fcclkselx3(&self) -> &FCCLKSELX3[src]

pub fn fcclkselx3_mut(&self) -> &mut FCCLKSELX3[src]

pub fn fcclksel3(&self) -> &FCCLKSEL3[src]

pub fn fcclksel3_mut(&self) -> &mut FCCLKSEL3[src]

pub fn fcclkselx4(&self) -> &FCCLKSELX4[src]

pub fn fcclkselx4_mut(&self) -> &mut FCCLKSELX4[src]

pub fn fcclksel4(&self) -> &FCCLKSEL4[src]

pub fn fcclksel4_mut(&self) -> &mut FCCLKSEL4[src]

pub fn fcclkselx5(&self) -> &FCCLKSELX5[src]

pub fn fcclkselx5_mut(&self) -> &mut FCCLKSELX5[src]

pub fn fcclksel5(&self) -> &FCCLKSEL5[src]

pub fn fcclksel5_mut(&self) -> &mut FCCLKSEL5[src]

pub fn fcclkselx6(&self) -> &FCCLKSELX6[src]

pub fn fcclkselx6_mut(&self) -> &mut FCCLKSELX6[src]

pub fn fcclksel6(&self) -> &FCCLKSEL6[src]

pub fn fcclksel6_mut(&self) -> &mut FCCLKSEL6[src]

pub fn fcclkselx7(&self) -> &FCCLKSELX7[src]

pub fn fcclkselx7_mut(&self) -> &mut FCCLKSELX7[src]

pub fn fcclksel7(&self) -> &FCCLKSEL7[src]

pub fn fcclksel7_mut(&self) -> &mut FCCLKSEL7[src]

pub fn flexfrgxctrl0(&self) -> &FLEXFRGXCTRL0[src]

pub fn flexfrgxctrl0_mut(&self) -> &mut FLEXFRGXCTRL0[src]

pub fn flexfrg0ctrl(&self) -> &FLEXFRG0CTRL[src]

pub fn flexfrg0ctrl_mut(&self) -> &mut FLEXFRG0CTRL[src]

pub fn flexfrgxctrl1(&self) -> &FLEXFRGXCTRL1[src]

pub fn flexfrgxctrl1_mut(&self) -> &mut FLEXFRGXCTRL1[src]

pub fn flexfrg1ctrl(&self) -> &FLEXFRG1CTRL[src]

pub fn flexfrg1ctrl_mut(&self) -> &mut FLEXFRG1CTRL[src]

pub fn flexfrgxctrl2(&self) -> &FLEXFRGXCTRL2[src]

pub fn flexfrgxctrl2_mut(&self) -> &mut FLEXFRGXCTRL2[src]

pub fn flexfrg2ctrl(&self) -> &FLEXFRG2CTRL[src]

pub fn flexfrg2ctrl_mut(&self) -> &mut FLEXFRG2CTRL[src]

pub fn flexfrgxctrl3(&self) -> &FLEXFRGXCTRL3[src]

pub fn flexfrgxctrl3_mut(&self) -> &mut FLEXFRGXCTRL3[src]

pub fn flexfrg3ctrl(&self) -> &FLEXFRG3CTRL[src]