Struct lpc55_pac::SYSCON

[+] Show declaration

pub struct SYSCON { /* fields omitted */ }

[−] Expand description

SYSCON

Implementations

impl SYSCON[−]

pub const fn ptr() -> *const RegisterBlock[−]

Returns a pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn systickclkselx0(&self) -> &SYSTICKCLKSELX0[−]

0x260 - Peripheral reset control register

pub fn systickclkselx0_mut(&self) -> &mut SYSTICKCLKSELX0[−]

0x260 - Peripheral reset control register

pub fn systickclksel0(&self) -> &SYSTICKCLKSEL0[−]

0x260 - System Tick Timer for CPU0 source select

pub fn systickclksel0_mut(&self) -> &mut SYSTICKCLKSEL0[−]

0x260 - System Tick Timer for CPU0 source select

pub fn systickclkselx1(&self) -> &SYSTICKCLKSELX1[−]

0x264 - Peripheral reset control register

pub fn systickclkselx1_mut(&self) -> &mut SYSTICKCLKSELX1[−]

0x264 - Peripheral reset control register

pub fn systickclksel1(&self) -> &SYSTICKCLKSEL1[−]

0x264 - System Tick Timer for CPU1 source select

pub fn systickclksel1_mut(&self) -> &mut SYSTICKCLKSEL1[−]

0x264 - System Tick Timer for CPU1 source select

pub fn ctimerclkselx0(&self) -> &CTIMERCLKSELX0[−]

0x26c - Peripheral reset control register

pub fn ctimerclkselx0_mut(&self) -> &mut CTIMERCLKSELX0[−]

0x26c - Peripheral reset control register

pub fn ctimerclksel0(&self) -> &CTIMERCLKSEL0[−]

0x26c - CTimer 0 clock source select

pub fn ctimerclksel0_mut(&self) -> &mut CTIMERCLKSEL0[−]

0x26c - CTimer 0 clock source select

pub fn ctimerclkselx1(&self) -> &CTIMERCLKSELX1[−]

0x270 - Peripheral reset control register

pub fn ctimerclkselx1_mut(&self) -> &mut CTIMERCLKSELX1[−]

0x270 - Peripheral reset control register

pub fn ctimerclksel1(&self) -> &CTIMERCLKSEL1[−]

0x270 - CTimer 1 clock source select

pub fn ctimerclksel1_mut(&self) -> &mut CTIMERCLKSEL1[−]

0x270 - CTimer 1 clock source select

pub fn ctimerclkselx2(&self) -> &CTIMERCLKSELX2[−]

0x274 - Peripheral reset control register

pub fn ctimerclkselx2_mut(&self) -> &mut CTIMERCLKSELX2[−]

0x274 - Peripheral reset control register

pub fn ctimerclksel2(&self) -> &CTIMERCLKSEL2[−]

0x274 - CTimer 2 clock source select

pub fn ctimerclksel2_mut(&self) -> &mut CTIMERCLKSEL2[−]

0x274 - CTimer 2 clock source select

pub fn ctimerclkselx3(&self) -> &CTIMERCLKSELX3[−]

0x278 - Peripheral reset control register

pub fn ctimerclkselx3_mut(&self) -> &mut CTIMERCLKSELX3[−]

0x278 - Peripheral reset control register

pub fn ctimerclksel3(&self) -> &CTIMERCLKSEL3[−]

0x278 - CTimer 3 clock source select

pub fn ctimerclksel3_mut(&self) -> &mut CTIMERCLKSEL3[−]

0x278 - CTimer 3 clock source select

pub fn ctimerclkselx4(&self) -> &CTIMERCLKSELX4[−]

0x27c - Peripheral reset control register

pub fn ctimerclkselx4_mut(&self) -> &mut CTIMERCLKSELX4[−]

0x27c - Peripheral reset control register

pub fn ctimerclksel4(&self) -> &CTIMERCLKSEL4[−]

0x27c - CTimer 4 clock source select

pub fn ctimerclksel4_mut(&self) -> &mut CTIMERCLKSEL4[−]

0x27c - CTimer 4 clock source select

pub fn fcclkselx0(&self) -> &FCCLKSELX0[−]

0x2b0 - Peripheral reset control register

pub fn fcclkselx0_mut(&self) -> &mut FCCLKSELX0[−]

0x2b0 - Peripheral reset control register

pub fn fcclksel0(&self) -> &FCCLKSEL0[−]

0x2b0 - Flexcomm Interface 0 clock source select for Fractional Rate Divider

pub fn fcclksel0_mut(&self) -> &mut FCCLKSEL0[−]

0x2b0 - Flexcomm Interface 0 clock source select for Fractional Rate Divider

pub fn fcclkselx1(&self) -> &FCCLKSELX1[−]

0x2b4 - Peripheral reset control register

pub fn fcclkselx1_mut(&self) -> &mut FCCLKSELX1[−]

0x2b4 - Peripheral reset control register

pub fn fcclksel1(&self) -> &FCCLKSEL1[−]

0x2b4 - Flexcomm Interface 1 clock source select for Fractional Rate Divider

pub fn fcclksel1_mut(&self) -> &mut FCCLKSEL1[−]

0x2b4 - Flexcomm Interface 1 clock source select for Fractional Rate Divider

pub fn fcclkselx2(&self) -> &FCCLKSELX2[−]

0x2b8 - Peripheral reset control register

pub fn fcclkselx2_mut(&self) -> &mut FCCLKSELX2[−]

0x2b8 - Peripheral reset control register

pub fn fcclksel2(&self) -> &FCCLKSEL2[−]

0x2b8 - Flexcomm Interface 2 clock source select for Fractional Rate Divider

pub fn fcclksel2_mut(&self) -> &mut FCCLKSEL2[−]

0x2b8 - Flexcomm Interface 2 clock source select for Fractional Rate Divider

pub fn fcclkselx3(&self) -> &FCCLKSELX3[−]

0x2bc - Peripheral reset control register

pub fn fcclkselx3_mut(&self) -> &mut FCCLKSELX3[−]

0x2bc - Peripheral reset control register

pub fn fcclksel3(&self) -> &FCCLKSEL3[−]

0x2bc - Flexcomm Interface 3 clock source select for Fractional Rate Divider

pub fn fcclksel3_mut(&self) -> &mut FCCLKSEL3[−]

0x2bc - Flexcomm Interface 3 clock source select for Fractional Rate Divider

pub fn fcclkselx4(&self) -> &FCCLKSELX4[−]

0x2c0 - Peripheral reset control register

pub fn fcclkselx4_mut(&self) -> &mut FCCLKSELX4[−]

0x2c0 - Peripheral reset control register

pub fn fcclksel4(&self) -> &FCCLKSEL4[−]

0x2c0 - Flexcomm Interface 4 clock source select for Fractional Rate Divider

pub fn fcclksel4_mut(&self) -> &mut FCCLKSEL4[−]

0x2c0 - Flexcomm Interface 4 clock source select for Fractional Rate Divider

pub fn fcclkselx5(&self) -> &FCCLKSELX5[−]

0x2c4 - Peripheral reset control register

pub fn fcclkselx5_mut(&self) -> &mut FCCLKSELX5[−]

0x2c4 - Peripheral reset control register

pub fn fcclksel5(&self) -> &FCCLKSEL5[−]

0x2c4 - Flexcomm Interface 5 clock source select for Fractional Rate Divider

pub fn fcclksel5_mut(&self) -> &mut FCCLKSEL5[−]

0x2c4 - Flexcomm Interface 5 clock source select for Fractional Rate Divider

pub fn fcclkselx6(&self) -> &FCCLKSELX6[−]

0x2c8 - Peripheral reset control register

pub fn fcclkselx6_mut(&self) -> &mut FCCLKSELX6[−]

0x2c8 - Peripheral reset control register

pub fn fcclksel6(&self) -> &FCCLKSEL6[−]

0x2c8 - Flexcomm Interface 6 clock source select for Fractional Rate Divider

pub fn fcclksel6_mut(&self) -> &mut FCCLKSEL6[−]

0x2c8 - Flexcomm Interface 6 clock source select for Fractional Rate Divider

pub fn fcclkselx7(&self) -> &FCCLKSELX7[−]

0x2cc - Peripheral reset control register

pub fn fcclkselx7_mut(&self) -> &mut FCCLKSELX7[−]

0x2cc - Peripheral reset control register

pub fn fcclksel7(&self) -> &FCCLKSEL7[−]

0x2cc - Flexcomm Interface 7 clock source select for Fractional Rate Divider

pub fn fcclksel7_mut(&self) -> &mut FCCLKSEL7[−]

0x2cc - Flexcomm Interface 7 clock source select for Fractional Rate Divider

pub fn flexfrgxctrl0(&self) -> &FLEXFRGXCTRL0[−]

0x320 - Peripheral reset control register

pub fn flexfrgxctrl0_mut(&self) -> &mut FLEXFRGXCTRL0[−]

0x320 - Peripheral reset control register

pub fn flexfrg0ctrl(&self) -> &FLEXFRG0CTRL[−]

0x320 - Fractional rate divider for flexcomm 0

pub fn flexfrg0ctrl_mut(&self) -> &mut FLEXFRG0CTRL[−]

0x320 - Fractional rate divider for flexcomm 0

pub fn flexfrgxctrl1(&self) -> &FLEXFRGXCTRL1[−]

0x324 - Peripheral reset control register

pub fn flexfrgxctrl1_mut(&self) -> &mut FLEXFRGXCTRL1[−]

0x324 - Peripheral reset control register

pub fn flexfrg1ctrl(&self) -> &FLEXFRG1CTRL[−]

0x324 - Fractional rate divider for flexcomm 1

pub fn flexfrg1ctrl_mut(&self) -> &mut FLEXFRG1CTRL[−]

0x324 - Fractional rate divider for flexcomm 1

pub fn flexfrgxctrl2(&self) -> &FLEXFRGXCTRL2[−]

0x328 - Peripheral reset control register

pub fn flexfrgxctrl2_mut(&self) -> &mut FLEXFRGXCTRL2[−]

0x328 - Peripheral reset control register

pub fn flexfrg2ctrl(&self) -> &FLEXFRG2CTRL[−]

0x328 - Fractional rate divider for flexcomm 2

pub fn flexfrg2ctrl_mut(&self) -> &mut FLEXFRG2CTRL[−]

0x328 - Fractional rate divider for flexcomm 2

pub fn flexfrgxctrl3(&self) -> &FLEXFRGXCTRL3[−]

0x32c - Peripheral reset control register

pub fn flexfrgxctrl3_mut(&self) -> &mut FLEXFRGXCTRL3[−]

0x32c - Peripheral reset control register

pub fn flexfrg3ctrl(&self) -> &FLEXFRG3CTRL[−]

0x32c - Fractional rate divider for flexcomm 3

pub fn flexfrg3ctrl_mut(&self) -> &mut FLEXFRG3CTRL[−]

0x32c - Fractional rate divider for flexcomm 3

pub fn flexfrgxctrl4(&self) -> &FLEXFRGXCTRL4[−]

0x330 - Peripheral reset control register

pub fn flexfrgxctrl4_mut(&self) -> &mut FLEXFRGXCTRL4[−]

0x330 - Peripheral reset control register

pub fn flexfrg4ctrl(&self) -> &FLEXFRG4CTRL[−]

0x330 - Fractional rate divider for flexcomm 4

pub fn flexfrg4ctrl_mut(&self) -> &mut FLEXFRG4CTRL[−]

0x330 - Fractional rate divider for flexcomm 4

pub fn flexfrgxctrl5(&self) -> &FLEXFRGXCTRL5[−]

0x334 - Peripheral reset control register

pub fn flexfrgxctrl5_mut(&self) -> &mut FLEXFRGXCTRL5[−]

0x334 - Peripheral reset control register

pub fn flexfrg5ctrl(&self) -> &FLEXFRG5CTRL[−]

0x334 - Fractional rate divider for flexcomm 5

pub fn flexfrg5ctrl_mut(&self) -> &mut FLEXFRG5CTRL[−]

0x334 - Fractional rate divider for flexcomm 5

pub fn flexfrgxctrl6(&self) -> &FLEXFRGXCTRL6[−]

0x338 - Peripheral reset control register

pub fn flexfrgxctrl6_mut(&self) -> &mut FLEXFRGXCTRL6[−]

0x338 - Peripheral reset control register

pub fn flexfrg6ctrl(&self) -> &FLEXFRG6CTRL[−]

0x338 - Fractional rate divider for flexcomm 6

pub fn flexfrg6ctrl_mut(&self) -> &mut FLEXFRG6CTRL[−]

0x338 - Fractional rate divider for flexcomm 6

pub fn flexfrgxctrl7(&self) -> &FLEXFRGXCTRL7[−]

0x33c - Peripheral reset control register

pub fn flexfrgxctrl7_mut(&self) -> &mut FLEXFRGXCTRL7[−]

0x33c - Peripheral reset control register

pub fn flexfrg7ctrl(&self) -> &FLEXFRG7CTRL[−]

0x33c - Fractional rate divider for flexcomm 7

pub fn flexfrg7ctrl_mut(&self) -> &mut FLEXFRG7CTRL[−]

0x33c - Fractional rate divider for flexcomm 7

Trait Implementations

impl Deref for SYSCON[+]

[+] Show hidden undocumented items

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target[−]

Dereferences the value.

impl Send for SYSCON