Type Definition lpc55_pac::syscon::FCCLKSEL1

type FCCLKSEL1 = Reg<u32, _FCCLKSEL1>;

Flexcomm Interface 1 clock source select for Fractional Rate Divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see fcclksel1 module

Trait Implementations

impl Readable for FCCLKSEL1

read() method returns fcclksel1::R reader structure

impl ResetValue for FCCLKSEL1

Register FCCLKSEL1 reset()'s with value 0x07

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register

impl Writable for FCCLKSEL1

write(|w| ..) method takes fcclksel1::W writer structure