Struct lpc55_pac::generic::Reg

pub struct Reg<U, REG> { /* fields omitted */ }

This structure provides volatile access to register

Implementations

impl<U, REG> Reg<U, REG> where
    Self: Readable,
    U: Copy, 

pub fn read(&self) -> R<U, Self>

Reads the contents of Readable register

You can read the contents of a register in such way:

let bits = periph.reg.read().bits();

or get the content of a particular field of a register.

let reader = periph.reg.read();
let bits = reader.field1().bits();
let flag = reader.field2().bit_is_set();

impl<U, REG> Reg<U, REG> where
    Self: ResetValue<Type = U> + Writable,
    U: Copy, 

pub fn reset(&self)

Writes the reset value to Writable register

Resets the register to its initial state

impl<U, REG> Reg<U, REG> where
    Self: ResetValue<Type = U> + Writable,
    U: Copy, 

pub fn write<F>(&self, f: F) where
    F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>, 

Writes bits to Writable register

You can write raw bits into a register:

periph.reg.write(|w| unsafe { w.bits(rawbits) });

or write only the fields you need:

periph.reg.write(|w| w
    .field1().bits(newfield1bits)
    .field2().set_bit()
    .field3().variant(VARIANT)
);

Other fields will have reset value.

impl<U, REG> Reg<U, REG> where
    Self: Writable,
    U: Copy + Default, 

pub fn write_with_zero<F>(&self, f: F) where
    F: FnOnce(&mut W<U, Self>) -> &mut W<U, Self>, 

Writes Zero to Writable register

Similar to write, but unused bits will contain 0.

impl<U, REG> Reg<U, REG> where
    Self: Readable + Writable,
    U: Copy, 

pub fn modify<F>(&self, f: F) where
    F: FnOnce(&R<U, Self>, &'w mut W<U, Self>) -> &'w mut W<U, Self>, 

Modifies the contents of the register

E.g. to do a read-modify-write sequence to change parts of a register:

periph.reg.modify(|r, w| unsafe { w.bits(
   r.bits() | 3
) });

or

periph.reg.modify(|_, w| w
    .field1().bits(newfield1bits)
    .field2().set_bit()
    .field3().variant(VARIANT)
);

Other fields will have value they had before call modify.

Trait Implementations

impl<U: Send, REG> Send for Reg<U, REG>