[−][src]Type Definition lpc55_pac::ahb_secure_ctrl::CPU0_LOCK_REG
type CPU0_LOCK_REG = Reg<u32, _CPU0_LOCK_REG>;
Miscalleneous control signals for in Cortex M33 (CPU0)
This register you can read, reset, write, write_with_zero, modify. See API.
For information about available fields see cpu0_lock_reg module
Trait Implementations
impl Readable for CPU0_LOCK_REG[src]
read() method returns cpu0_lock_reg::R reader structure
impl ResetValue for CPU0_LOCK_REG[src][+]
type Type = u32
fn reset_value() -> Self::Type[src][−]
impl Writable for CPU0_LOCK_REG[src]
write(|w| ..) method takes cpu0_lock_reg::W writer structure