[−][src]Type Definition lpc55_pac::usart0::INTENSET
type INTENSET = Reg<u32, _INTENSET>;
Interrupt Enable read and Set register for USART (not FIFO) status. Contains individual interrupt enable bits for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
This register you can read, reset, write, write_with_zero, modify. See API.
For information about available fields see intenset module
Trait Implementations
impl Readable for INTENSET[src]
read() method returns intenset::R reader structure
impl ResetValue for INTENSET[src][+]
type Type = u32
fn reset_value() -> Self::Type[src][−]
impl Writable for INTENSET[src]
write(|w| ..) method takes intenset::W writer structure