[−][src]Type Definition lpc55_pac::syscon::ADCCLKDIV
type ADCCLKDIV = Reg<u32, _ADCCLKDIV>;
ADC clock divider
This register you can read, reset, write, write_with_zero, modify. See API.
For information about available fields see adcclkdiv module
Trait Implementations
impl Readable for ADCCLKDIV[src]
read() method returns adcclkdiv::R reader structure
impl ResetValue for ADCCLKDIV[src][+]
type Type = u32
fn reset_value() -> Self::Type[src][−]
impl Writable for ADCCLKDIV[src]
write(|w| ..) method takes adcclkdiv::W writer structure