[−][src]Module lpc55_pac::syscon::pll1ctrl

PLL1 550m control

Structs

BWDIRECT_W	Write proxy for field `BWDIRECT`
BYPASSPLL_W	Write proxy for field `BYPASSPLL`
BYPASSPOSTDIV2_W	Write proxy for field `BYPASSPOSTDIV2`
BYPASSPOSTDIV_W	Write proxy for field `BYPASSPOSTDIV`
BYPASSPREDIV_W	Write proxy for field `BYPASSPREDIV`
CLKEN_W	Write proxy for field `CLKEN`
FRMCLKSTABLE_W	Write proxy for field `FRMCLKSTABLE`
FRMEN_W	Write proxy for field `FRMEN`
LIMUPOFF_W	Write proxy for field `LIMUPOFF`
SELI_W	Write proxy for field `SELI`
SELP_W	Write proxy for field `SELP`
SELR_W	Write proxy for field `SELR`
SKEWEN_W	Write proxy for field `SKEWEN`

BWDIRECT_A	control of the bandwidth of the PLL.
BYPASSPLL_A	Bypass PLL input clock is sent directly to the PLL output (default).
BYPASSPOSTDIV2_A	bypass of the divide-by-2 divider in the post-divider.
BYPASSPOSTDIV_A	bypass of the post-divider.
BYPASSPREDIV_A	bypass of the pre-divider.
CLKEN_A	enable the output clock.
SKEWEN_A	Skew mode.

BWDIRECT_R	Reader of field `BWDIRECT`
BYPASSPLL_R	Reader of field `BYPASSPLL`
BYPASSPOSTDIV2_R	Reader of field `BYPASSPOSTDIV2`
BYPASSPOSTDIV_R	Reader of field `BYPASSPOSTDIV`
BYPASSPREDIV_R	Reader of field `BYPASSPREDIV`
CLKEN_R	Reader of field `CLKEN`
FRMCLKSTABLE_R	Reader of field `FRMCLKSTABLE`
FRMEN_R	Reader of field `FRMEN`
LIMUPOFF_R	Reader of field `LIMUPOFF`
R	Reader of register PLL1CTRL
SELI_R	Reader of field `SELI`
SELP_R	Reader of field `SELP`
SELR_R	Reader of field `SELR`
SKEWEN_R	Reader of field `SKEWEN`
W	Writer for register PLL1CTRL