[−][src]Type Definition lpc55_pac::syscon::autoclkgateoverride::W
type W = W<u32, AUTOCLKGATEOVERRIDE>;
Writer for register AUTOCLKGATEOVERRIDE
Implementations
impl W
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pub fn rom(&mut self) -> ROM_W<'_>
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Bit 0 - Control automatic clock gating of ROM controller.
pub fn ramx_ctrl(&mut self) -> RAMX_CTRL_W<'_>
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Bit 1 - Control automatic clock gating of RAMX controller.
pub fn ram0_ctrl(&mut self) -> RAM0_CTRL_W<'_>
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Bit 2 - Control automatic clock gating of RAM0 controller.
pub fn ram1_ctrl(&mut self) -> RAM1_CTRL_W<'_>
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Bit 3 - Control automatic clock gating of RAM1 controller.
pub fn ram2_ctrl(&mut self) -> RAM2_CTRL_W<'_>
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Bit 4 - Control automatic clock gating of RAM2 controller.
pub fn ram3_ctrl(&mut self) -> RAM3_CTRL_W<'_>
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Bit 5 - Control automatic clock gating of RAM3 controller.
pub fn ram4_ctrl(&mut self) -> RAM4_CTRL_W<'_>
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Bit 6 - Control automatic clock gating of RAM4 controller.
pub fn sync0_apb(&mut self) -> SYNC0_APB_W<'_>
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Bit 7 - Control automatic clock gating of synchronous bridge controller 0.
pub fn sync1_apb(&mut self) -> SYNC1_APB_W<'_>
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Bit 8 - Control automatic clock gating of synchronous bridge controller 1.
pub fn crcgen(&mut self) -> CRCGEN_W<'_>
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Bit 11 - Control automatic clock gating of CRCGEN controller.
pub fn sdma0(&mut self) -> SDMA0_W<'_>
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Bit 12 - Control automatic clock gating of DMA0 controller.
pub fn sdma1(&mut self) -> SDMA1_W<'_>
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Bit 13 - Control automatic clock gating of DMA1 controller.
pub fn usb0(&mut self) -> USB0_W<'_>
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Bit 14 - Control automatic clock gating of USB controller.
pub fn syscon(&mut self) -> SYSCON_W<'_>
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Bit 15 - Control automatic clock gating of synchronous system controller registers bank.
pub fn enableupdate(&mut self) -> ENABLEUPDATE_W<'_>
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Bits 16:31 - The value 0xC0DE must be written for AUTOCLKGATEOVERRIDE registers fields updates to have effect.