[−][src]Type Definition lpc55_pac::spi0::cfg::W
type W = W<u32, CFG>;
Writer for register CFG
Implementations
impl W
[src]
pub fn enable(&mut self) -> ENABLE_W<'_>
[src]
Bit 0 - SPI enable.
pub fn master(&mut self) -> MASTER_W<'_>
[src]
Bit 2 - Master mode select.
pub fn lsbf(&mut self) -> LSBF_W<'_>
[src]
Bit 3 - LSB First mode enable.
pub fn cpha(&mut self) -> CPHA_W<'_>
[src]
Bit 4 - Clock Phase select.
pub fn cpol(&mut self) -> CPOL_W<'_>
[src]
Bit 5 - Clock Polarity select.
pub fn loop_(&mut self) -> LOOP_W<'_>
[src]
Bit 7 - Loopback mode enable. Loopback mode applies only to Master mode, and connects transmit and receive data connected together to allow simple software testing.
pub fn spol0(&mut self) -> SPOL0_W<'_>
[src]
Bit 8 - SSEL0 Polarity select.
pub fn spol1(&mut self) -> SPOL1_W<'_>
[src]
Bit 9 - SSEL1 Polarity select.
pub fn spol2(&mut self) -> SPOL2_W<'_>
[src]
Bit 10 - SSEL2 Polarity select.
pub fn spol3(&mut self) -> SPOL3_W<'_>
[src]
Bit 11 - SSEL3 Polarity select.