[−][src]Type Definition lpc55_pac::sct0::DMAREQ1
type DMAREQ1 = Reg<u32, _DMAREQ1>;
SCT DMA request 1 register
This register you can read, reset, write, write_with_zero, modify. See API.
For information about available fields see dmareq1 module
Trait Implementations
impl Readable for DMAREQ1[src]
read() method returns dmareq1::R reader structure
impl ResetValue for DMAREQ1[src]
Register DMAREQ1 reset()'s with value 0
impl Writable for DMAREQ1[src]
write(|w| ..) method takes dmareq1::W writer structure