[−][src]Module lpc55_pac::i2c0::msttime

Master timing configuration.

Structs

MSTSCLHIGH_W	Write proxy for field `MSTSCLHIGH`
MSTSCLLOW_W	Write proxy for field `MSTSCLLOW`

MSTSCLHIGH_A	Master SCL High time. Specifies the minimum high time that will be asserted by this master on SCL. Other masters in a multi-master system could shorten this time. This corresponds to the parameter tHIGH in the I2C bus specification. I2C bus specification parameters tSU;STO and tHD;STA have the same values and are also controlled by MSTSCLHIGH.
MSTSCLLOW_A	Master SCL Low time. Specifies the minimum low time that will be asserted by this master on SCL. Other devices on the bus (masters or slaves) could lengthen this time. This corresponds to the parameter t LOW in the I2C bus specification. I2C bus specification parameters tBUF and tSU;STA have the same values and are also controlled by MSTSCLLOW.