Type Definition lpc55_pac::dma0::ENABLESET0

type ENABLESET0 = Reg<u32, _ENABLESET0>;

[−] Expand description

Channel Enable read and Set for all DMA channels.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see enableset0 module

Trait Implementations

impl Readable for ENABLESET0

read() method returns enableset0::R reader structure

impl ResetValue for ENABLESET0[+]

Register ENABLESET0 reset()'s with value 0

[+] Show hidden undocumented items

type Type = u32

Register size

fn reset_value() -> Self::Type[−]

Reset value of the register

impl Writable for ENABLESET0

write(|w| ..) method takes enableset0::W writer structure