[−][src]Enum lpc55_pac::ctimer0::ctcr::CINSEL_A
pub enum CINSEL_A { CHANNEL_0, CHANNEL_1, CHANNEL_2, CHANNEL_3, }
Count Input Select When bits 1:0 in this register are not 00, these bits select which CAP pin is sampled for clocking. Note: If Counter mode is selected for a particular CAPn input in the CTCR, the 3 bits for that input in the Capture Control Register (CCR) must be programmed as 000. However, capture and/or interrupt can be selected for the other 3 CAPn inputs in the same timer.
Value on reset: 0
Variants
0: Channel 0. CAPn.0 for CTIMERn
1: Channel 1. CAPn.1 for CTIMERn
2: Channel 2. CAPn.2 for CTIMERn
3: Channel 3. CAPn.3 for CTIMERn
Trait Implementations
impl Clone for CINSEL_A
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impl Copy for CINSEL_A
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impl Debug for CINSEL_A
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impl From<CINSEL_A> for u8
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impl PartialEq<CINSEL_A> for CINSEL_A
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impl StructuralPartialEq for CINSEL_A
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Auto Trait Implementations
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