[−][src]Type Definition lpc55_pac::usbphy::ctrl::R
type R = R<u32, CTRL>;
Reader of register CTRL
Implementations
impl R
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pub fn enhostdiscondetect(&self) -> ENHOSTDISCONDETECT_R
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Bit 1 - For host mode, enables high-speed disconnect detector
pub fn enirqhostdiscon(&self) -> ENIRQHOSTDISCON_R
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Bit 2 - Enable IRQ for Host disconnect: Enables interrupt for detection of disconnection to Device when in high-speed host mode
pub fn hostdiscondetect_irq(&self) -> HOSTDISCONDETECT_IRQ_R
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Bit 3 - Indicates that the device has disconnected in High-Speed mode
pub fn endevplugindet(&self) -> ENDEVPLUGINDET_R
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Bit 4 - Enables non-standard resistive plugged-in detection This bit field controls connection of nominal 200kohm resistors to both the USB_DP and USB_DM pins as one method of detecting when a USB cable is attached in device mode
pub fn devplugin_polarity(&self) -> DEVPLUGIN_POLARITY_R
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Bit 5 - Device plugin polarity: For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in
pub fn resumeirqsticky(&self) -> RESUMEIRQSTICKY_R
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Bit 8 - Resume IRQ: Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it
pub fn enirqresumedetect(&self) -> ENIRQRESUMEDETECT_R
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Bit 9 - Enable IRQ Resume detect: Enables interrupt for detection of a non-J state on the USB line
pub fn resume_irq(&self) -> RESUME_IRQ_R
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Bit 10 - Resume IRQ: Indicates that the host is sending a wake-up after suspend
pub fn devplugin_irq(&self) -> DEVPLUGIN_IRQ_R
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Bit 12 - Indicates that the device is connected
pub fn enutmilevel2(&self) -> ENUTMILEVEL2_R
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Bit 14 - Enables UTMI+ Level 2 operation for the USB HS PHY
pub fn enutmilevel3(&self) -> ENUTMILEVEL3_R
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Bit 15 - Enables UTMI+ Level 3 operation for the USB HS PHY
pub fn enirqwakeup(&self) -> ENIRQWAKEUP_R
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Bit 16 - Enable wake-up IRQ: Enables interrupt for the wake-up events.
pub fn wakeup_irq(&self) -> WAKEUP_IRQ_R
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Bit 17 - Wake-up IRQ: Indicates that there is a wak-eup event
pub fn autoresume_en(&self) -> AUTORESUME_EN_R
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Bit 18 - Enable the auto resume feature, when set, HW will use 32KHz clock to send Resume to respond to the device remote wakeup(for host mode only)
pub fn enautoclr_clkgate(&self) -> ENAUTOCLR_CLKGATE_R
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Bit 19 - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended
pub fn enautoclr_phy_pwd(&self) -> ENAUTOCLR_PHY_PWD_R
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Bit 20 - Enables the feature to auto-clear the PWD register bits in PWD if there is wakeup event while USB is suspended
pub fn endpdmchg_wkup(&self) -> ENDPDMCHG_WKUP_R
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Bit 21 - Enable DP DM change wake-up: Not for customer use
pub fn envbuschg_wkup(&self) -> ENVBUSCHG_WKUP_R
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Bit 23 - Enable VBUS change wake-up: Enables the feature to wake-up USB if VBUS is toggled when USB is suspended
pub fn enautoclr_usbclkgate(&self) -> ENAUTOCLR_USBCLKGATE_R
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Bit 25 - Enable auto-clear USB Clock gate: Enables the feature to auto-clear the USB0_CLKGATE/USB1_CLKGATE register bit in HW_DIGCTL_CTRL if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
pub fn enautoset_usbclks(&self) -> ENAUTOSET_USBCLKS_R
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Bit 26 - Enable auto-set of USB clocks: Enables the feature to auto-clear the EN_USB_CLKS register bits in HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_P LL1CTRL1 if there is wake-up event on USB0/USB1 while USB0/USB1 is suspended
pub fn host_force_ls_se0(&self) -> HOST_FORCE_LS_SE0_R
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Bit 28 - Forces the next FS packet that is transmitted to have a EOP with low-speed timing
pub fn utmi_suspendm(&self) -> UTMI_SUSPENDM_R
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Bit 29 - Used by the PHY to indicate a powered-down state
pub fn clkgate(&self) -> CLKGATE_R
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Bit 30 - Gate UTMI Clocks
pub fn sftrst(&self) -> SFTRST_R
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Bit 31 - Writing a 1 to this bit will soft-reset the PWD, TX, RX, and CTRL registers