[−][src]Type Definition lpc55_pac::usart0::ctl::R
type R = R<u32, CTL>;
Reader of register CTL
Implementations
impl R[src]
pub fn txbrken(&self) -> TXBRKEN_R[src]
Bit 1 - Break Enable.
pub fn addrdet(&self) -> ADDRDET_R[src]
Bit 2 - Enable address detect mode.
pub fn txdis(&self) -> TXDIS_R[src]
Bit 6 - Transmit Disable.
pub fn cc(&self) -> CC_R[src]
Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
pub fn clrcconrx(&self) -> CLRCCONRX_R[src]
Bit 9 - Clear Continuous Clock.
pub fn autobaud(&self) -> AUTOBAUD_R[src]
Bit 16 - Autobaud enable.