Type Definition lpc55_pac::syscon::presetctrl2::W

type W = W<u32, PRESETCTRL2>;

Writer for register PRESETCTRL2

Implementations

impl W

pub fn dma1_rst(&mut self) -> DMA1_RST_W<'_>

Bit 1 - DMA1 reset control.

pub fn comp_rst(&mut self) -> COMP_RST_W<'_>

Bit 2 - Comparator reset control.

pub fn sdio_rst(&mut self) -> SDIO_RST_W<'_>

Bit 3 - SDIO reset control.

pub fn usb1_host_rst(&mut self) -> USB1_HOST_RST_W<'_>

Bit 4 - USB1 Host reset control.

pub fn usb1_dev_rst(&mut self) -> USB1_DEV_RST_W<'_>

Bit 5 - USB1 dev reset control.

pub fn usb1_ram_rst(&mut self) -> USB1_RAM_RST_W<'_>

Bit 6 - USB1 RAM reset control.

pub fn usb1_phy_rst(&mut self) -> USB1_PHY_RST_W<'_>

Bit 7 - USB1 PHY reset control.

pub fn freqme_rst(&mut self) -> FREQME_RST_W<'_>

Bit 8 - Frequency meter reset control.

pub fn rng_rst(&mut self) -> RNG_RST_W<'_>

Bit 13 - RNG reset control.

pub fn sysctl_rst(&mut self) -> SYSCTL_RST_W<'_>

Bit 15 - SYSCTL Block reset.

pub fn usb0_hostm_rst(&mut self) -> USB0_HOSTM_RST_W<'_>

Bit 16 - USB0 Host Master reset control.

pub fn usb0_hosts_rst(&mut self) -> USB0_HOSTS_RST_W<'_>

Bit 17 - USB0 Host Slave reset control.

pub fn hash_aes_rst(&mut self) -> HASH_AES_RST_W<'_>

Bit 18 - HASH_AES reset control.

pub fn pq_rst(&mut self) -> PQ_RST_W<'_>

Bit 19 - Power Quad reset control.

pub fn plulut_rst(&mut self) -> PLULUT_RST_W<'_>

Bit 20 - PLU LUT reset control.

pub fn timer3_rst(&mut self) -> TIMER3_RST_W<'_>

Bit 21 - Timer 3 reset control.

pub fn timer4_rst(&mut self) -> TIMER4_RST_W<'_>

Bit 22 - Timer 4 reset control.

pub fn puf_rst(&mut self) -> PUF_RST_W<'_>

Bit 23 - PUF reset control reset control.

pub fn casper_rst(&mut self) -> CASPER_RST_W<'_>

Bit 24 - Casper reset control.

pub fn analog_ctrl_rst(&mut self) -> ANALOG_CTRL_RST_W<'_>

Bit 27 - analog control reset control.

pub fn hs_lspi_rst(&mut self) -> HS_LSPI_RST_W<'_>

Bit 28 - HS LSPI reset control.

pub fn gpio_sec_rst(&mut self) -> GPIO_SEC_RST_W<'_>

Bit 29 - GPIO secure reset control.

pub fn gpio_sec_int_rst(&mut self) -> GPIO_SEC_INT_RST_W<'_>

Bit 30 - GPIO secure int reset control.