[−][src]Type Definition lpc55_pac::syscon::presetctrl0::R
type R = R<u32, PRESETCTRL0>;
Reader of register PRESETCTRL0
Implementations
impl R
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pub fn rom_rst(&self) -> ROM_RST_R
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Bit 1 - ROM reset control.
pub fn sram_ctrl1_rst(&self) -> SRAM_CTRL1_RST_R
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Bit 3 - SRAM Controller 1 reset control.
pub fn sram_ctrl2_rst(&self) -> SRAM_CTRL2_RST_R
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Bit 4 - SRAM Controller 2 reset control.
pub fn sram_ctrl3_rst(&self) -> SRAM_CTRL3_RST_R
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Bit 5 - SRAM Controller 3 reset control.
pub fn sram_ctrl4_rst(&self) -> SRAM_CTRL4_RST_R
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Bit 6 - SRAM Controller 4 reset control.
pub fn flash_rst(&self) -> FLASH_RST_R
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Bit 7 - Flash controller reset control.
pub fn fmc_rst(&self) -> FMC_RST_R
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Bit 8 - FMC controller reset control.
pub fn mux_rst(&self) -> MUX_RST_R
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Bit 11 - Input Mux reset control.
pub fn iocon_rst(&self) -> IOCON_RST_R
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Bit 13 - I/O controller reset control.
pub fn gpio0_rst(&self) -> GPIO0_RST_R
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Bit 14 - GPIO0 reset control.
pub fn gpio1_rst(&self) -> GPIO1_RST_R
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Bit 15 - GPIO1 reset control.
pub fn gpio2_rst(&self) -> GPIO2_RST_R
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Bit 16 - GPIO2 reset control.
pub fn gpio3_rst(&self) -> GPIO3_RST_R
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Bit 17 - GPIO3 reset control.
pub fn pint_rst(&self) -> PINT_RST_R
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Bit 18 - Pin interrupt (PINT) reset control.
pub fn gint_rst(&self) -> GINT_RST_R
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Bit 19 - Group interrupt (GINT) reset control.
pub fn dma0_rst(&self) -> DMA0_RST_R
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Bit 20 - DMA0 reset control.
pub fn crcgen_rst(&self) -> CRCGEN_RST_R
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Bit 21 - CRCGEN reset control.
pub fn wwdt_rst(&self) -> WWDT_RST_R
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Bit 22 - Watchdog Timer reset control.
pub fn rtc_rst(&self) -> RTC_RST_R
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Bit 23 - Real Time Clock (RTC) reset control.
pub fn mailbox_rst(&self) -> MAILBOX_RST_R
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Bit 26 - Inter CPU communication Mailbox reset control.
pub fn adc_rst(&self) -> ADC_RST_R
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Bit 27 - ADC reset control.