[−][src]Struct lpc55_pac::prince::RegisterBlock
Register block
Fields
enc_enable: ENC_ENABLE
0x00 - Encryption Enable register
mask_lsb: MASK_LSB
0x04 - Data Mask register, 32 Least Significant Bits
mask_msb: MASK_MSB
0x08 - Data Mask register, 32 Most Significant Bits
lock: LOCK
0x0c - Lock register
iv_lsb0: IV_LSB0
0x10 - Initial Vector register for region 0, Least Significant Bits
iv_msb0: IV_MSB0
0x14 - Initial Vector register for region 0, Most Significant Bits
base_addr0: BASE_ADDR0
0x18 - Base Address for region 0 register
sr_enable0: SR_ENABLE0
0x1c - Sub-Region Enable register for region 0
iv_lsb1: IV_LSB1
0x20 - Initial Vector register for region 1, Least Significant Bits
iv_msb1: IV_MSB1
0x24 - Initial Vector register for region 1, Most Significant Bits
base_addr1: BASE_ADDR1
0x28 - Base Address for region 1 register
sr_enable1: SR_ENABLE1
0x2c - Sub-Region Enable register for region 1
iv_lsb2: IV_LSB2
0x30 - Initial Vector register for region 2, Least Significant Bits
iv_msb2: IV_MSB2
0x34 - Initial Vector register for region 2, Most Significant Bits
base_addr2: BASE_ADDR2
0x38 - Base Address for region 2 register
sr_enable2: SR_ENABLE2
0x3c - Sub-Region Enable register for region 2
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