[−][src]Enum lpc55_pac::prince::lock::LOCKREG1_A
pub enum LOCKREG1_A { DISABLED, ENABLED, }
Lock Region 1 registers.
Value on reset: 0
Variants
0: Disabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are writable..
1: Enabled. IV_LSB1, IV_MSB1, BASE_ADDR1, and SR_ENABLE1 are not writable..
Trait Implementations
impl Clone for LOCKREG1_A
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impl Copy for LOCKREG1_A
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impl Debug for LOCKREG1_A
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impl From<LOCKREG1_A> for bool
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impl PartialEq<LOCKREG1_A> for LOCKREG1_A
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impl StructuralPartialEq for LOCKREG1_A
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Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> Same<T> for T
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type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,