[−][src]Module lpc55_pac::ahb_secure_ctrl::sec_ctrl_apb_bridge0_mem_ctrl0

Security access rules for APB Bridge 0 peripherals. Each APB bridge sector is 4 Kbytes. There are 32 APB Bridge 0 sectors in total.

Structs

GINT0_RULE_W	Write proxy for field `GINT0_RULE`
GINT1_RULE_W	Write proxy for field `GINT1_RULE`
INPUTMUX_RULE_W	Write proxy for field `INPUTMUX_RULE`
IOCON_RULE_W	Write proxy for field `IOCON_RULE`
PINT_RULE_W	Write proxy for field `PINT_RULE`
SEC_PINT_RULE_W	Write proxy for field `SEC_PINT_RULE`
SYSCON_RULE_W	Write proxy for field `SYSCON_RULE`

GINT0_RULE_A	GPIO input Interrupt 0
GINT1_RULE_A	GPIO input Interrupt 1
INPUTMUX_RULE_A	Peripheral input multiplexing
IOCON_RULE_A	I/O Configuration
PINT_RULE_A	Pin Interrupt and Pattern match
SEC_PINT_RULE_A	Secure Pin Interrupt and Pattern match
SYSCON_RULE_A	System Configuration

GINT0_RULE_R	Reader of field `GINT0_RULE`
GINT1_RULE_R	Reader of field `GINT1_RULE`
INPUTMUX_RULE_R	Reader of field `INPUTMUX_RULE`
IOCON_RULE_R	Reader of field `IOCON_RULE`
PINT_RULE_R	Reader of field `PINT_RULE`
R	Reader of register SEC_CTRL_APB_BRIDGE0_MEM_CTRL0
SEC_PINT_RULE_R	Reader of field `SEC_PINT_RULE`
SYSCON_RULE_R	Reader of field `SYSCON_RULE`
W	Writer for register SEC_CTRL_APB_BRIDGE0_MEM_CTRL0