[−][src]Module lpc55_pac::ahb_secure_ctrl::sec_cpu_int_mask1

Secure Interrupt mask for CPU1

Structs

CASPER_IRQ_W	Write proxy for field `CASPER_IRQ`
CTIMER2_IRQ_W	Write proxy for field `CTIMER2_IRQ`
CTIMER4_IRQ_W	Write proxy for field `CTIMER4_IRQ`
GPIO_INT0_IRQ4_W	Write proxy for field `GPIO_INT0_IRQ4`
GPIO_INT0_IRQ5_W	Write proxy for field `GPIO_INT0_IRQ5`
GPIO_INT0_IRQ6_W	Write proxy for field `GPIO_INT0_IRQ6`
GPIO_INT0_IRQ7_W	Write proxy for field `GPIO_INT0_IRQ7`
LSPI_HS_IRQ_W	Write proxy for field `LSPI_HS_IRQ`
OS_EVENT_TIMER_IRQ_W	Write proxy for field `OS_EVENT_TIMER_IRQ`
PLU_IRQ_W	Write proxy for field `PLU_IRQ`
PQ_IRQ_W	Write proxy for field `PQ_IRQ`
PUFKEY_IRQ_W	Write proxy for field `PUFKEY_IRQ`
RESERVED0_W	Write proxy for field `RESERVED0`
RESERVED1_W	Write proxy for field `RESERVED1`
RESERVED2_W	Write proxy for field `RESERVED2`
RESERVED3_W	Write proxy for field `RESERVED3`
RESERVED4_W	Write proxy for field `RESERVED4`
RESERVED5_W	Write proxy for field `RESERVED5`
SDIO_IRQ_W	Write proxy for field `SDIO_IRQ`
SDMA1_IRQ_W	Write proxy for field `SDMA1_IRQ`
SEC_GPIO_INT0_IRQ0_W	Write proxy for field `SEC_GPIO_INT0_IRQ0`
SEC_GPIO_INT0_IRQ1_W	Write proxy for field `SEC_GPIO_INT0_IRQ1`
SEC_HYPERVISOR_CALL_IRQ_W	Write proxy for field `SEC_HYPERVISOR_CALL_IRQ`
SEC_VIO_IRQ_W	Write proxy for field `SEC_VIO_IRQ`
SHA_IRQ_W	Write proxy for field `SHA_IRQ`
USB1_IRQ_W	Write proxy for field `USB1_IRQ`
USB1_NEEDCLK_W	Write proxy for field `USB1_NEEDCLK`
USB1_PHY_IRQ_W	Write proxy for field `USB1_PHY_IRQ`

Enums

CASPER_IRQ_A	CASPER interrupt.
CTIMER2_IRQ_A	Standard counter/timer 2 interrupt.
CTIMER4_IRQ_A	Standard counter/timer 4 interrupt.
GPIO_INT0_IRQ4_A	Pin interrupt 4 or pattern match engine slice 4 interrupt.
GPIO_INT0_IRQ5_A	Pin interrupt 5 or pattern match engine slice 5 interrupt.
GPIO_INT0_IRQ6_A	Pin interrupt 6 or pattern match engine slice 6 interrupt.
GPIO_INT0_IRQ7_A	Pin interrupt 7 or pattern match engine slice 7 interrupt.
LSPI_HS_IRQ_A	High Speed SPI interrupt
OS_EVENT_TIMER_IRQ_A	OS Event Timer and OS Event Timer Wakeup interrupts
PLU_IRQ_A	Programmable Look-Up Controller interrupt.
PQ_IRQ_A	Power Quad interrupt.
PUFKEY_IRQ_A	PUF interrupt.
RESERVED0_A	Reserved. Read value is undefined, only zero should be written.
RESERVED1_A	Reserved. Read value is undefined, only zero should be written.
RESERVED2_A	Reserved. Read value is undefined, only zero should be written.
RESERVED3_A	Reserved. Read value is undefined, only zero should be written.
RESERVED4_A	Reserved. Read value is undefined, only zero should be written.
RESERVED5_A	Reserved. Read value is undefined, only zero should be written.
SDIO_IRQ_A	SDIO Controller interrupt.
SDMA1_IRQ_A	System DMA 1 (Secure) interrupt
SEC_GPIO_INT0_IRQ0_A	Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.
SEC_GPIO_INT0_IRQ1_A	Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.
SEC_HYPERVISOR_CALL_IRQ_A	Secure fault Hyper Visor call interrupt.
SEC_VIO_IRQ_A	Security Violation interrupt.
SHA_IRQ_A	HASH-AES interrupt.
USB1_IRQ_A	USB High Speed Controller interrupt.
USB1_NEEDCLK_A	USB High Speed Controller Clock request interrupt.
USB1_PHY_IRQ_A	USB High Speed PHY Controller interrupt.

Type Definitions

CASPER_IRQ_R	Reader of field `CASPER_IRQ`
CTIMER2_IRQ_R	Reader of field `CTIMER2_IRQ`
CTIMER4_IRQ_R	Reader of field `CTIMER4_IRQ`
GPIO_INT0_IRQ4_R	Reader of field `GPIO_INT0_IRQ4`
GPIO_INT0_IRQ5_R	Reader of field `GPIO_INT0_IRQ5`
GPIO_INT0_IRQ6_R	Reader of field `GPIO_INT0_IRQ6`
GPIO_INT0_IRQ7_R	Reader of field `GPIO_INT0_IRQ7`
LSPI_HS_IRQ_R	Reader of field `LSPI_HS_IRQ`
OS_EVENT_TIMER_IRQ_R	Reader of field `OS_EVENT_TIMER_IRQ`
PLU_IRQ_R	Reader of field `PLU_IRQ`
PQ_IRQ_R	Reader of field `PQ_IRQ`
PUFKEY_IRQ_R	Reader of field `PUFKEY_IRQ`
R	Reader of register SEC_CPU_INT_MASK1
RESERVED0_R	Reader of field `RESERVED0`
RESERVED1_R	Reader of field `RESERVED1`
RESERVED2_R	Reader of field `RESERVED2`
RESERVED3_R	Reader of field `RESERVED3`
RESERVED4_R	Reader of field `RESERVED4`
RESERVED5_R	Reader of field `RESERVED5`
SDIO_IRQ_R	Reader of field `SDIO_IRQ`
SDMA1_IRQ_R	Reader of field `SDMA1_IRQ`
SEC_GPIO_INT0_IRQ0_R	Reader of field `SEC_GPIO_INT0_IRQ0`
SEC_GPIO_INT0_IRQ1_R	Reader of field `SEC_GPIO_INT0_IRQ1`
SEC_HYPERVISOR_CALL_IRQ_R	Reader of field `SEC_HYPERVISOR_CALL_IRQ`
SEC_VIO_IRQ_R	Reader of field `SEC_VIO_IRQ`
SHA_IRQ_R	Reader of field `SHA_IRQ`
USB1_IRQ_R	Reader of field `USB1_IRQ`
USB1_NEEDCLK_R	Reader of field `USB1_NEEDCLK`
USB1_PHY_IRQ_R	Reader of field `USB1_PHY_IRQ`
W	Writer for register SEC_CPU_INT_MASK1