[−][src]Module lpc55_pac::usart0::intenset

[−]

Interrupt Enable read and Set register for USART (not FIFO) status. Contains individual interrupt enable bits for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.

Structs

ABERREN_W	Write proxy for field `ABERREN`
DELTACTSEN_W	Write proxy for field `DELTACTSEN`
DELTARXBRKEN_W	Write proxy for field `DELTARXBRKEN`
FRAMERREN_W	Write proxy for field `FRAMERREN`
PARITYERREN_W	Write proxy for field `PARITYERREN`
RXNOISEEN_W	Write proxy for field `RXNOISEEN`
STARTEN_W	Write proxy for field `STARTEN`
TXDISEN_W	Write proxy for field `TXDISEN`
TXIDLEEN_W	Write proxy for field `TXIDLEEN`

Type Definitions

ABERREN_R	Reader of field `ABERREN`
DELTACTSEN_R	Reader of field `DELTACTSEN`
DELTARXBRKEN_R	Reader of field `DELTARXBRKEN`
FRAMERREN_R	Reader of field `FRAMERREN`
PARITYERREN_R	Reader of field `PARITYERREN`
R	Reader of register INTENSET
RXNOISEEN_R	Reader of field `RXNOISEEN`
STARTEN_R	Reader of field `STARTEN`
TXDISEN_R	Reader of field `TXDISEN`
TXIDLEEN_R	Reader of field `TXIDLEEN`
W	Writer for register INTENSET