[−][src]Module lpc55_pac::inputmux
Input multiplexing (INPUT MUX)
Modules
dma0_itrig_ena | Enable DMA0 triggers |
dma0_itrig_ena_clr | Clear one or several bits in DMA0_ITRIG_ENA register |
dma0_itrig_ena_set | Set one or several bits in DMA0_ITRIG_ENA register |
dma0_itrig_inmux | Trigger select register for DMA0 channel |
dma0_otrig_inmux | DMA0 output trigger selection to become DMA0 trigger |
dma0_req_ena | Enable DMA0 requests |
dma0_req_ena_clr | Clear one or several bits in DMA0_REQ_ENA register |
dma0_req_ena_set | Set one or several bits in DMA0_REQ_ENA register |
dma1_itrig_ena | Enable DMA1 triggers |
dma1_itrig_ena_clr | Clear one or several bits in DMA1_ITRIG_ENA register |
dma1_itrig_ena_set | Set one or several bits in DMA1_ITRIG_ENA register |
dma1_itrig_inmux | Trigger select register for DMA1 channel |
dma1_otrig_inmux | DMA1 output trigger selection to become DMA1 trigger |
dma1_req_ena | Enable DMA1 requests |
dma1_req_ena_clr | Clear one or several bits in DMA1_REQ_ENA register |
dma1_req_ena_set | Set one or several bits in DMA1_REQ_ENA register |
freqmeas_ref | Selection for frequency measurement reference clock |
freqmeas_target | Selection for frequency measurement target clock |
pintsecsel | Pin interrupt secure select register |
pintsel | Pin interrupt select register |
sct0_inmux | Input mux register for SCT0 input |
timer0captsel | Capture select registers for TIMER0 inputs |
timer1captsel | Capture select registers for TIMER1 inputs |
timer2captsel | Capture select registers for TIMER2 inputs |
timer3captsel | Capture select registers for TIMER3 inputs |
timer4captsel | Capture select registers for TIMER4 inputs |
Structs
RegisterBlock | Register block |
Type Definitions
DMA0_ITRIG_ENA | Enable DMA0 triggers |
DMA0_ITRIG_ENA_CLR | Clear one or several bits in DMA0_ITRIG_ENA register |
DMA0_ITRIG_ENA_SET | Set one or several bits in DMA0_ITRIG_ENA register |
DMA0_ITRIG_INMUX | Trigger select register for DMA0 channel |
DMA0_OTRIG_INMUX | DMA0 output trigger selection to become DMA0 trigger |
DMA0_REQ_ENA | Enable DMA0 requests |
DMA0_REQ_ENA_CLR | Clear one or several bits in DMA0_REQ_ENA register |
DMA0_REQ_ENA_SET | Set one or several bits in DMA0_REQ_ENA register |
DMA1_ITRIG_ENA | Enable DMA1 triggers |
DMA1_ITRIG_ENA_CLR | Clear one or several bits in DMA1_ITRIG_ENA register |
DMA1_ITRIG_ENA_SET | Set one or several bits in DMA1_ITRIG_ENA register |
DMA1_ITRIG_INMUX | Trigger select register for DMA1 channel |
DMA1_OTRIG_INMUX | DMA1 output trigger selection to become DMA1 trigger |
DMA1_REQ_ENA | Enable DMA1 requests |
DMA1_REQ_ENA_CLR | Clear one or several bits in DMA1_REQ_ENA register |
DMA1_REQ_ENA_SET | Set one or several bits in DMA1_REQ_ENA register |
FREQMEAS_REF | Selection for frequency measurement reference clock |
FREQMEAS_TARGET | Selection for frequency measurement target clock |
PINTSECSEL | Pin interrupt secure select register |
PINTSEL | Pin interrupt select register |
SCT0_INMUX | Input mux register for SCT0 input |
TIMER0CAPTSEL | Capture select registers for TIMER0 inputs |
TIMER1CAPTSEL | Capture select registers for TIMER1 inputs |
TIMER2CAPTSEL | Capture select registers for TIMER2 inputs |
TIMER3CAPTSEL | Capture select registers for TIMER3 inputs |
TIMER4CAPTSEL | Capture select registers for TIMER4 inputs |